Initial commit

LICENSE

@@ -0,0 +1,9 @@
+/*
+ * ------------------------------------------------------------
+ * "THE BEERWARE LICENSE" (Revision 42):
+ * <MKjanek32> wrote this code. As long as you retain this 
+ * notice, you can do whatever you want with this stuff. If we
+ * meet someday, and you think this stuff is worth it, you can
+ * buy me a beer in return.
+ * ------------------------------------------------------------
+*/

README.md

@@ -0,0 +1,5 @@
+# PWr - Układy cyfrowe i systemy wbudowane 2 P
+Projekt z kursu UCiSW2 u doktora Sugiera - obsługa magnetometru HMC5883L i wykorzystanie go jako kompas wyświetlający pomiary na monitorze za pomocą wyjścia VGA. Implementacja projektu została wykonana na własnej płytce ZRtech Espier III z układem FPGA Xilinx Spartan-6 XC6SLX9 i sygnałem zegarowym o częstotliwości 48 MHz.    
+
+Kontrolerem magnetometru jest moduł Magneto_Drv, komunikujący się z urządzeniem za pomocą modułu I2C_Master napisanego i udostępnionego przez doktora na stronie kursu. Za wyświetlanie kompasu na monitorze odpowiada moduł VGACompass generujący obraz o rozdzielczości 800x600 i częstotliwości odświeżania (około) 75 Hz. Moduł Display4x7S służy do wyświetlania pomiarów w osi Z (niewykorzystywanej przez kompas) na wyświetlaczu 7-segmentowym jako liczbę w systemie U16 - i jest klonem modułu o tej samej nazwie napisanego przez doktora dla laboratoryjnych płytek CPLD. Do ustawiania częstotliwości pomiarów według trybów z dokumentacji magnetometru służą przyciski S1-S3 (wciśnięcie - 1), nowe ustawienie obowiązuje od resetu układu (przycisk S4). Dioda D2 sygnalizuje nowy pomiar (DRDY), dioda D5 błąd w komunikacji I2C (NACK, zgaśnięcie - 1).  
+Film przedstawiający działanie projektu: www.youtube.com/watch?v=9VuPkd-sqCk

ucisw2_magnetometr/Display4x7S.spl

@@ -0,0 +1,9 @@
+[Inputs]
+Clk
+=DI[15:0]=
+=DP[3:0]=
+=Blank[3:0]=
+[Outputs]
+=DS_EN[3:0]=
+=DS[7:0]=
+[BiDir]

ucisw2_magnetometr/Display4x7S.sym

@@ -0,0 +1,32 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<symbol version="7" name="Display4x7S">
+    <symboltype>BLOCK</symboltype>
+    <timestamp>2018-5-25T12:38:38</timestamp>
+    <pin polarity="Input" x="0" y="-224" name="Clk" />
+    <pin polarity="Input" x="0" y="-160" name="DI(15:0)" />
+    <pin polarity="Input" x="0" y="-96" name="DP(3:0)" />
+    <pin polarity="Input" x="0" y="-32" name="Blank(3:0)" />
+    <pin polarity="Output" x="384" y="-224" name="DS_EN(3:0)" />
+    <pin polarity="Output" x="384" y="-32" name="DS(7:0)" />
+    <graph>
+        <rect width="256" x="64" y="-256" height="256" />
+        <attrtext style="alignment:BCENTER;fontsize:56;fontname:Arial" attrname="SymbolName" x="192" y="-264" type="symbol" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-224" type="pin Clk" />
+        <line x2="0" y1="-224" y2="-224" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-160" type="pin DI(15:0)" />
+        <rect width="64" x="0" y="-172" height="24" />
+        <line x2="0" y1="-160" y2="-160" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-96" type="pin DP(3:0)" />
+        <rect width="64" x="0" y="-108" height="24" />
+        <line x2="0" y1="-96" y2="-96" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-32" type="pin Blank(3:0)" />
+        <rect width="64" x="0" y="-44" height="24" />
+        <line x2="0" y1="-32" y2="-32" x1="64" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-224" type="pin DS_EN(3:0)" />
+        <rect width="64" x="320" y="-236" height="24" />
+        <line x2="384" y1="-224" y2="-224" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-32" type="pin DS(7:0)" />
+        <rect width="64" x="320" y="-44" height="24" />
+        <line x2="384" y1="-32" y2="-32" x1="320" />
+    </graph>
+</symbol>

ucisw2_magnetometr/Display4x7S.vhd

@@ -0,0 +1,119 @@
+----------------------------------------------------------------------------------
+-- Company: 
+-- Engineer: 
+-- 
+-- Create Date:    21:30:49 01/03/2018 
+-- Design Name: 
+-- Module Name:    Display4x7S - Behavioral 
+-- Project Name: 
+-- Target Devices: 
+-- Tool versions: 
+-- Description: 
+--
+-- Dependencies: 
+--
+-- Revision: 
+-- Revision 0.01 - File Created
+-- Additional Comments: 
+--
+----------------------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+
+-- Uncomment the following library declaration if using
+-- arithmetic functions with Signed or Unsigned values
+--use IEEE.NUMERIC_STD.ALL;
+
+-- Uncomment the following library declaration if instantiating
+-- any Xilinx primitives in this code.
+--library UNISIM;
+--use UNISIM.VComponents.all;
+
+entity Display4x7S is
+    Port ( DI : in  STD_LOGIC_VECTOR (15 downto 0);
+           DP : in  STD_LOGIC_VECTOR (3 downto 0);
+           Blank : in  STD_LOGIC_VECTOR (3 downto 0);
+           Clk : in  STD_LOGIC;
+           DS_EN : out  STD_LOGIC_VECTOR (3 downto 0);
+           DS : out  STD_LOGIC_VECTOR (7 downto 0));
+end Display4x7S;
+
+architecture Behavioral of Display4x7S is
+	type state_type is (A, B, C, D);
+	signal state, next_state : state_type;
+	signal cycles : integer range 0 to 10000 := 0;
+	signal Bits : STD_LOGIC_VECTOR (3 downto 0);
+	signal Digit : STD_LOGIC_VECTOR (6 downto 0);
+	signal Point : STD_LOGIC;
+
+begin
+	process1 : process(Clk)
+	begin
+		if rising_edge(Clk) then
+			-- Clock frequency divider
+			-- 48 MHz -> 4800 Hz
+			-- (1200 Hz digit refresh rate)
+			if cycles = 10000 then
+				state <= next_state;
+				cycles <= 0;
+			else
+				cycles <= cycles + 1;
+			end if;
+		end if;
+	end process process1;
+   
+	process2 : process(state)
+	begin
+		next_state <= state; -- by default
+		
+		case state is
+			when A =>
+				next_state <= B;
+			when B =>
+				next_state <= C;
+			when C =>
+				next_state <= D;
+			when D =>
+				next_state <= A;
+		end case;
+	end process process2;
+	
+	Bits <=	DI(3 downto 0) when state = A else
+				DI(7 downto 4) when state = B else
+				DI(11 downto 8) when state = C else
+				DI(15 downto 12) when state = D else
+				"0000";
+	
+	Point <=	DP(0) when state = A else
+				DP(1) when state = B else
+				DP(2) when state = C else
+				DP(3) when state = D	else
+				'0';
+				
+	with Bits select
+		Digit <=	"0111111" when "0000",
+					"0000110" when "0001",
+					"1011011" when "0010",
+					"1001111" when "0011",
+					"1100110" when "0100",
+					"1101101" when "0101",
+					"1111101" when "0110",
+					"0000111" when "0111",
+					"1111111" when "1000",
+					"1101111" when "1001",
+					"1011111" when "1010",
+					"1111100" when "1011",
+					"0111001" when "1100",
+					"1011110" when "1101",
+					"1111001" when "1110",
+					"1110001" when "1111",
+					"0000000" when others;
+	
+	DS_EN <=	"1110" when state = A and Blank(0) = '0' else
+				"1101" when state = B and Blank(1) = '0' else
+				"1011" when state = C and Blank(2) = '0' else
+				"0111" when state = D and Blank(3) = '0' else
+				"1111";
+	
+	DS <= Point & Digit;
+end Behavioral;

ucisw2_magnetometr/ESPIER_III.ucf

@@ -0,0 +1,117 @@
+## ESPIER III V105 Spartan-6 board constraint file v1.1
+## J. Potocki 2018
+
+# Clock
+NET "CLK" LOC = P56 | PERIOD = 20.83ns HIGH 50%;
+
+# Keys
+NET "Rate<0>" LOC = P15;
+NET "Rate<1>" LOC = P21;
+NET "Rate<2>" LOC = P17;
+NET "Reset" LOC = P16;
+
+# LEDs
+NET "DRLED" LOC = P95 | SLEW = "SLOW";
+#NET "LED<1>" LOC = P94 | SLEW = "SLOW";
+#NET "LED<2>" LOC = P98 | SLEW = "SLOW";
+NET "NACK" LOC = P97 | SLEW = "SLOW";
+
+# DISPL. 7-SEG
+NET "DS_EN<0>" LOC = P75 | SLEW = "SLOW";
+NET "DS_EN<1>" LOC = P67 | SLEW = "SLOW";
+NET "DS_EN<2>" LOC = P74 | SLEW = "SLOW";
+NET "DS_EN<3>" LOC = P66 | SLEW = "SLOW";
+NET "DS<0>"    LOC = P80;  # Seg. A
+NET "DS<1>"    LOC = P79;  # Seg. B
+NET "DS<2>"    LOC = P83;  # Seg. C
+NET "DS<3>"    LOC = P82;  # Seg. D
+NET "DS<4>"    LOC = P81;  # Seg. E
+NET "DS<5>"    LOC = P78;  # Seg. F
+NET "DS<6>"    LOC = P84;  # Seg. G
+NET "DS<7>"    LOC = P85;  # Seg. DP
+
+# PS/2
+#NET "PS2_CLK"  LOC = P24 | SLEW = "SLOW";
+#NET "PS2_DATA" LOC = P23 | SLEW = "SLOW";
+
+# IrDA
+#NET "IRDA" LOC = P62 | SLEW = "SLOW";
+
+# RS-232 PL-2303 (clone)
+#NET "RS_TXD" LOC = P12 | SLEW = "SLOW";
+#NET "RS_RXD" LOC = P14 | SLEW = "SLOW";
+
+# ADC
+#NET "ADCSN" LOC = P61 | SLEW = "SLOW";
+#NET "ADDAT" LOC = P59 | SLEW = "SLOW";
+#NET "ADCLK" LOC = P55 | SLEW = "SLOW";
+
+# SPI FLASH
+#NET "FLASH_CLK" LOC = P88 | SLEW = "SLOW";
+#NET "FLASH_CS"  LOC = P93 | SLEW = "SLOW";
+#NET "FLASH_DI"  LOC = P87 | SLEW = "SLOW";
+#NET "FLASH_DO"  LOC = P92 | SLEW = "SLOW";
+
+# Buzzer
+#NET "BP1" LOC = P11 | SLEW = "SLOW";
+
+# VGA
+NET "V_R<0>" LOC = P46 | SLEW = FAST;
+NET "V_R<1>" LOC = P47 | SLEW = FAST;
+NET "V_R<2>" LOC = P48 | SLEW = FAST;
+NET "V_R<3>" LOC = P50 | SLEW = FAST;
+NET "V_R<4>" LOC = P51 | SLEW = FAST;
+NET "V_G<0>" LOC = P35 | SLEW = FAST;
+NET "V_G<1>" LOC = P40 | SLEW = FAST;
+NET "V_G<2>" LOC = P41 | SLEW = FAST;
+NET "V_G<3>" LOC = P43 | SLEW = FAST;
+NET "V_G<4>" LOC = P44 | SLEW = FAST;
+NET "V_G<5>" LOC = P45 | SLEW = FAST;
+NET "V_B<0>" LOC = P29 | SLEW = FAST;
+NET "V_B<1>" LOC = P30 | SLEW = FAST;
+NET "V_B<2>" LOC = P32 | SLEW = FAST;
+NET "V_B<3>" LOC = P33 | SLEW = FAST;
+NET "V_B<4>" LOC = P34 | SLEW = FAST;
+NET "V_SYNC" LOC = P27 | SLEW = FAST;
+NET "H_SYNC" LOC = P26 | SLEW = FAST;
+
+# SDRAM
+#NET "SDRAM_A<0>"   LOC = P7;
+#NET "SDRAM_A<1>"   LOC = P8;
+#NET "SDRAM_A<2>"   LOC = P9;
+#NET "SDRAM_A<3>"   LOC = P10;
+#NET "SDRAM_A<4>"   LOC = P143;
+#NET "SDRAM_A<5>"   LOC = P142;
+#NET "SDRAM_A<6>"   LOC = P141;
+#NET "SDRAM_A<7>"   LOC = P140;
+#NET "SDRAM_A<8>"   LOC = P139;
+#NET "SDRAM_A<9>"   LOC = P138;
+#NET "SDRAM_A<10>"  LOC = P6;
+#NET "SDRAM_A<11>"  LOC = P137;
+#NET "SDRAM_A<12>"  LOC = P134;
+#NET "SDRAM_BA<1>"  LOC = P5;
+#NET "SDRAM_BA<0>"  LOC = P2;
+#NET "SDRAM_CKE"    LOC = P133;
+#NET "SDRAM_CLK"    LOC = P132;
+#NET "SDRAM_CS_N"   LOC = P1;
+#NET "SDRAM_DQMH"   LOC = P131;
+#NET "SDRAM_DQML"   LOC = P114;
+#NET "SDRAM_WE_N"   LOC = P115;
+#NET "SDRAM_CAS_N"  LOC = P116;
+#NET "SDRAM_RAS_N"  LOC = P117;
+#NET "SDRAM_DQ<0>"  LOC = P100;
+#NET "SDRAM_DQ<1>"  LOC = P99;
+#NET "SDRAM_DQ<2>"  LOC = P102;
+#NET "SDRAM_DQ<3>"  LOC = P101;
+#NET "SDRAM_DQ<4>"  LOC = P104;
+#NET "SDRAM_DQ<5>"  LOC = P105;
+#NET "SDRAM_DQ<6>"  LOC = P111;
+#NET "SDRAM_DQ<7>"  LOC = P112;
+#NET "SDRAM_DQ<8>"  LOC = P127;
+#NET "SDRAM_DQ<9>"  LOC = P126;
+#NET "SDRAM_DQ<10>" LOC = P124;
+#NET "SDRAM_DQ<11>" LOC = P123;
+#NET "SDRAM_DQ<12>" LOC = P121;
+#NET "SDRAM_DQ<13>" LOC = P120;
+#NET "SDRAM_DQ<14>" LOC = P119;
+#NET "SDRAM_DQ<15>" LOC = P118;

ucisw2_magnetometr/I2C_Master.sym

@@ -0,0 +1,58 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<symbol version="7" name="I2C_Master">
+    <symboltype>BLOCK</symboltype>
+    <timestamp>2015-11-24T12:12:48</timestamp>
+    <pin polarity="Input" x="0" y="-480" name="Go" />
+    <pin polarity="Input" x="0" y="-416" name="Address(7:0)" />
+    <pin polarity="Input" x="0" y="-352" name="ReadCnt(3:0)" />
+    <pin polarity="BiDirectional" x="464" y="-480" name="SDA" />
+    <pin polarity="BiDirectional" x="464" y="-416" name="SCL" />
+    <pin polarity="Input" x="0" y="-256" name="FIFO_Pop" />
+    <pin polarity="Input" x="0" y="-192" name="FIFO_Push" />
+    <pin polarity="Input" x="0" y="-128" name="FIFO_DI(7:0)" />
+    <pin polarity="Output" x="464" y="-256" name="FIFO_Empty" />
+    <pin polarity="Output" x="464" y="-192" name="FIFO_Full" />
+    <pin polarity="Output" x="464" y="-128" name="FIFO_DO(7:0)" />
+    <pin polarity="Input" x="0" y="-32" name="Reset" />
+    <pin polarity="Input" x="0" y="32" name="Clk" />
+    <pin polarity="Output" x="464" y="-32" name="Busy" />
+    <pin polarity="Output" x="464" y="32" name="NACK" />
+    <graph>
+        <rect width="336" x="64" y="-512" height="572" />
+        <attrtext style="alignment:BCENTER;fontsize:56;fontname:Arial" attrname="SymbolName" x="216" y="-520" type="symbol" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-480" type="pin Go" />
+        <line x2="0" y1="-480" y2="-480" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-416" type="pin Address(7:0)" />
+        <rect width="64" x="0" y="-428" height="24" />
+        <line x2="0" y1="-416" y2="-416" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-352" type="pin ReadCnt(3:0)" />
+        <rect width="64" x="0" y="-364" height="24" />
+        <line x2="0" y1="-352" y2="-352" x1="64" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="392" y="-480" type="pin SDA" />
+        <line x2="464" y1="-480" y2="-480" x1="400" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="392" y="-416" type="pin SCL" />
+        <line x2="464" y1="-416" y2="-416" x1="400" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-256" type="pin FIFO_Pop" />
+        <line x2="0" y1="-256" y2="-256" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-192" type="pin FIFO_Push" />
+        <line x2="0" y1="-192" y2="-192" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-128" type="pin FIFO_DI(7:0)" />
+        <rect width="64" x="0" y="-140" height="24" />
+        <line x2="0" y1="-128" y2="-128" x1="64" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="392" y="-256" type="pin FIFO_Empty" />
+        <line x2="464" y1="-256" y2="-256" x1="400" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="392" y="-192" type="pin FIFO_Full" />
+        <line x2="464" y1="-192" y2="-192" x1="400" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="392" y="-128" type="pin FIFO_DO(7:0)" />
+        <rect width="64" x="400" y="-140" height="24" />
+        <line x2="464" y1="-128" y2="-128" x1="400" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-32" type="pin Reset" />
+        <line x2="0" y1="-32" y2="-32" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="32" type="pin Clk" />
+        <line x2="0" y1="32" y2="32" x1="64" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="392" y="-32" type="pin Busy" />
+        <line x2="464" y1="-32" y2="-32" x1="400" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="392" y="32" type="pin NACK" />
+        <line x2="464" y1="32" y2="32" x1="400" />
+    </graph>
+</symbol>

ucisw2_magnetometr/MagnetoHMC5883LCtrl.jhd

@@ -0,0 +1,5 @@
+MODULE MagnetoHMC5883LCtrl
+	SUBMODULE I2C_Master
+		INSTANCE I2CCtrl
+	SUBMODULE Magneto_Drv
+		INSTANCE MagnetoInterface

ucisw2_magnetometr/MagnetoHMC5883LCtrl.sch

@@ -0,0 +1,270 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<drawing version="7">
+    <attr value="spartan6" name="DeviceFamilyName">
+        <trait delete="all:0" />
+        <trait editname="all:0" />
+        <trait edittrait="all:0" />
+    </attr>
+    <netlist>
+        <signal name="XLXN_5" />
+        <signal name="OutputRate(2:0)" />
+        <signal name="Clk" />
+        <signal name="XLXN_6" />
+        <signal name="XLXN_27(7:0)" />
+        <signal name="XLXN_28(7:0)" />
+        <signal name="XLXN_29(3:0)" />
+        <signal name="XLXN_4" />
+        <signal name="XLXN_52" />
+        <signal name="XLXN_54" />
+        <signal name="XLXN_55" />
+        <signal name="XLXN_57(7:0)" />
+        <signal name="DRDY" />
+        <signal name="DR_New" />
+        <signal name="ID(23:0)" />
+        <signal name="DRX(15:0)" />
+        <signal name="DRY(15:0)" />
+        <signal name="DRZ(15:0)" />
+        <signal name="SDA" />
+        <signal name="SCL" />
+        <signal name="NACK" />
+        <signal name="Reset" />
+        <port polarity="Input" name="OutputRate(2:0)" />
+        <port polarity="Input" name="Clk" />
+        <port polarity="Input" name="DRDY" />
+        <port polarity="Output" name="DR_New" />
+        <port polarity="Output" name="ID(23:0)" />
+        <port polarity="Output" name="DRX(15:0)" />
+        <port polarity="Output" name="DRY(15:0)" />
+        <port polarity="Output" name="DRZ(15:0)" />
+        <port polarity="BiDirectional" name="SDA" />
+        <port polarity="BiDirectional" name="SCL" />
+        <port polarity="Output" name="NACK" />
+        <port polarity="Input" name="Reset" />
+        <blockdef name="I2C_Master">
+            <timestamp>2015-11-24T14:12:50</timestamp>
+            <rect width="336" x="64" y="-512" height="572" />
+            <line x2="0" y1="-480" y2="-480" x1="64" />
+            <rect width="64" x="0" y="-428" height="24" />
+            <line x2="0" y1="-416" y2="-416" x1="64" />
+            <rect width="64" x="0" y="-364" height="24" />
+            <line x2="0" y1="-352" y2="-352" x1="64" />
+            <line x2="464" y1="-480" y2="-480" x1="400" />
+            <line x2="464" y1="-416" y2="-416" x1="400" />
+            <line x2="0" y1="-256" y2="-256" x1="64" />
+            <line x2="0" y1="-192" y2="-192" x1="64" />
+            <rect width="64" x="0" y="-140" height="24" />
+            <line x2="0" y1="-128" y2="-128" x1="64" />
+            <line x2="464" y1="-256" y2="-256" x1="400" />
+            <line x2="464" y1="-192" y2="-192" x1="400" />
+            <rect width="64" x="400" y="-140" height="24" />
+            <line x2="464" y1="-128" y2="-128" x1="400" />
+            <line x2="0" y1="-32" y2="-32" x1="64" />
+            <line x2="0" y1="32" y2="32" x1="64" />
+            <line x2="464" y1="-32" y2="-32" x1="400" />
+            <line x2="464" y1="32" y2="32" x1="400" />
+        </blockdef>
+        <blockdef name="Magneto_Drv">
+            <timestamp>2018-4-17T13:58:12</timestamp>
+            <rect width="400" x="64" y="-704" height="704" />
+            <line x2="0" y1="-672" y2="-672" x1="64" />
+            <line x2="0" y1="-592" y2="-592" x1="64" />
+            <line x2="0" y1="-512" y2="-512" x1="64" />
+            <line x2="0" y1="-432" y2="-432" x1="64" />
+            <line x2="0" y1="-352" y2="-352" x1="64" />
+            <line x2="0" y1="-272" y2="-272" x1="64" />
+            <rect width="64" x="0" y="-204" height="24" />
+            <line x2="0" y1="-192" y2="-192" x1="64" />
+            <rect width="64" x="0" y="-124" height="24" />
+            <line x2="0" y1="-112" y2="-112" x1="64" />
+            <line x2="528" y1="-672" y2="-672" x1="464" />
+            <line x2="528" y1="-608" y2="-608" x1="464" />
+            <line x2="528" y1="-544" y2="-544" x1="464" />
+            <line x2="528" y1="-480" y2="-480" x1="464" />
+            <rect width="64" x="464" y="-428" height="24" />
+            <line x2="528" y1="-416" y2="-416" x1="464" />
+            <rect width="64" x="464" y="-364" height="24" />
+            <line x2="528" y1="-352" y2="-352" x1="464" />
+            <rect width="64" x="464" y="-300" height="24" />
+            <line x2="528" y1="-288" y2="-288" x1="464" />
+            <rect width="64" x="464" y="-236" height="24" />
+            <line x2="528" y1="-224" y2="-224" x1="464" />
+            <rect width="64" x="464" y="-172" height="24" />
+            <line x2="528" y1="-160" y2="-160" x1="464" />
+            <rect width="64" x="464" y="-108" height="24" />
+            <line x2="528" y1="-96" y2="-96" x1="464" />
+            <rect width="64" x="464" y="-44" height="24" />
+            <line x2="528" y1="-32" y2="-32" x1="464" />
+        </blockdef>
+        <block symbolname="I2C_Master" name="I2CCtrl">
+            <blockpin signalname="XLXN_4" name="Go" />
+            <blockpin signalname="XLXN_28(7:0)" name="Address(7:0)" />
+            <blockpin signalname="XLXN_29(3:0)" name="ReadCnt(3:0)" />
+            <blockpin signalname="SDA" name="SDA" />
+            <blockpin signalname="SCL" name="SCL" />
+            <blockpin signalname="XLXN_6" name="FIFO_Pop" />
+            <blockpin signalname="XLXN_5" name="FIFO_Push" />
+            <blockpin signalname="XLXN_27(7:0)" name="FIFO_DI(7:0)" />
+            <blockpin signalname="XLXN_52" name="FIFO_Empty" />
+            <blockpin signalname="XLXN_54" name="FIFO_Full" />
+            <blockpin signalname="XLXN_57(7:0)" name="FIFO_DO(7:0)" />
+            <blockpin signalname="Reset" name="Reset" />
+            <blockpin signalname="Clk" name="Clk" />
+            <blockpin signalname="XLXN_55" name="Busy" />
+            <blockpin signalname="NACK" name="NACK" />
+        </block>
+        <block symbolname="Magneto_Drv" name="MagnetoInterface">
+            <blockpin signalname="XLXN_52" name="I2C_FIFO_Empty" />
+            <blockpin signalname="XLXN_54" name="I2C_FIFO_Full" />
+            <blockpin signalname="XLXN_55" name="I2C_Busy" />
+            <blockpin signalname="DRDY" name="DRDY" />
+            <blockpin signalname="Reset" name="Reset" />
+            <blockpin signalname="Clk" name="Clk" />
+            <blockpin signalname="XLXN_57(7:0)" name="I2C_FIFO_DO(7:0)" />
+            <blockpin signalname="OutputRate(2:0)" name="OutputRate(2:0)" />
+            <blockpin signalname="XLXN_4" name="I2C_Go" />
+            <blockpin signalname="XLXN_5" name="I2C_FIFO_Push" />
+            <blockpin signalname="XLXN_6" name="I2C_FIFO_Pop" />
+            <blockpin signalname="DR_New" name="DR_New" />
+            <blockpin signalname="XLXN_27(7:0)" name="I2C_FIFO_DI(7:0)" />
+            <blockpin signalname="XLXN_28(7:0)" name="I2C_Addr(7:0)" />
+            <blockpin signalname="XLXN_29(3:0)" name="I2C_ReadCnt(3:0)" />
+            <blockpin signalname="ID(23:0)" name="ID(23:0)" />
+            <blockpin signalname="DRX(15:0)" name="DRX(15:0)" />
+            <blockpin signalname="DRY(15:0)" name="DRY(15:0)" />
+            <blockpin signalname="DRZ(15:0)" name="DRZ(15:0)" />
+        </block>
+    </netlist>
+    <sheet sheetnum="1" width="3520" height="2720">
+        <branch name="XLXN_5">
+            <wire x2="1328" y1="720" y2="720" x1="1008" />
+            <wire x2="1328" y1="528" y2="720" x1="1328" />
+            <wire x2="1408" y1="528" y2="528" x1="1328" />
+        </branch>
+        <branch name="OutputRate(2:0)">
+            <wire x2="464" y1="1216" y2="1216" x1="256" />
+            <wire x2="480" y1="1216" y2="1216" x1="464" />
+        </branch>
+        <branch name="Clk">
+            <wire x2="304" y1="1056" y2="1056" x1="256" />
+            <wire x2="480" y1="1056" y2="1056" x1="304" />
+            <wire x2="304" y1="1056" y2="1440" x1="304" />
+            <wire x2="1392" y1="1440" y2="1440" x1="304" />
+            <wire x2="1408" y1="752" y2="752" x1="1392" />
+            <wire x2="1392" y1="752" y2="1440" x1="1392" />
+        </branch>
+        <branch name="XLXN_6">
+            <wire x2="1296" y1="784" y2="784" x1="1008" />
+            <wire x2="1296" y1="464" y2="784" x1="1296" />
+            <wire x2="1408" y1="464" y2="464" x1="1296" />
+        </branch>
+        <branch name="XLXN_27(7:0)">
+            <wire x2="1264" y1="912" y2="912" x1="1008" />
+            <wire x2="1264" y1="592" y2="912" x1="1264" />
+            <wire x2="1408" y1="592" y2="592" x1="1264" />
+        </branch>
+        <branch name="XLXN_28(7:0)">
+            <wire x2="1232" y1="976" y2="976" x1="1008" />
+            <wire x2="1232" y1="304" y2="976" x1="1232" />
+            <wire x2="1408" y1="304" y2="304" x1="1232" />
+        </branch>
+        <branch name="XLXN_29(3:0)">
+            <wire x2="1200" y1="1040" y2="1040" x1="1008" />
+            <wire x2="1200" y1="368" y2="1040" x1="1200" />
+            <wire x2="1408" y1="368" y2="368" x1="1200" />
+        </branch>
+        <branch name="XLXN_4">
+            <wire x2="1168" y1="656" y2="656" x1="1008" />
+            <wire x2="1408" y1="240" y2="240" x1="1168" />
+            <wire x2="1168" y1="240" y2="656" x1="1168" />
+        </branch>
+        <instance x="1408" y="720" name="I2CCtrl" orien="R0">
+        </instance>
+        <branch name="XLXN_52">
+            <wire x2="432" y1="112" y2="656" x1="432" />
+            <wire x2="480" y1="656" y2="656" x1="432" />
+            <wire x2="1936" y1="112" y2="112" x1="432" />
+            <wire x2="1936" y1="112" y2="464" x1="1936" />
+            <wire x2="1936" y1="464" y2="464" x1="1872" />
+        </branch>
+        <branch name="XLXN_54">
+            <wire x2="400" y1="80" y2="736" x1="400" />
+            <wire x2="480" y1="736" y2="736" x1="400" />
+            <wire x2="1968" y1="80" y2="80" x1="400" />
+            <wire x2="1968" y1="80" y2="528" x1="1968" />
+            <wire x2="1968" y1="528" y2="528" x1="1872" />
+        </branch>
+        <branch name="XLXN_55">
+            <wire x2="336" y1="16" y2="816" x1="336" />
+            <wire x2="480" y1="816" y2="816" x1="336" />
+            <wire x2="2032" y1="16" y2="16" x1="336" />
+            <wire x2="2032" y1="16" y2="688" x1="2032" />
+            <wire x2="2032" y1="688" y2="688" x1="1872" />
+        </branch>
+        <branch name="XLXN_57(7:0)">
+            <wire x2="368" y1="48" y2="1136" x1="368" />
+            <wire x2="480" y1="1136" y2="1136" x1="368" />
+            <wire x2="2000" y1="48" y2="48" x1="368" />
+            <wire x2="2000" y1="48" y2="592" x1="2000" />
+            <wire x2="2000" y1="592" y2="592" x1="1872" />
+        </branch>
+        <instance x="480" y="1328" name="MagnetoInterface" orien="R0">
+        </instance>
+        <branch name="DRDY">
+            <wire x2="480" y1="896" y2="896" x1="464" />
+            <wire x2="464" y1="896" y2="1376" x1="464" />
+            <wire x2="2080" y1="1376" y2="1376" x1="464" />
+        </branch>
+        <branch name="DR_New">
+            <wire x2="1024" y1="848" y2="848" x1="1008" />
+            <wire x2="2080" y1="848" y2="848" x1="1024" />
+        </branch>
+        <branch name="ID(23:0)">
+            <wire x2="1024" y1="1104" y2="1104" x1="1008" />
+            <wire x2="2080" y1="1104" y2="1104" x1="1024" />
+        </branch>
+        <branch name="DRX(15:0)">
+            <wire x2="1024" y1="1168" y2="1168" x1="1008" />
+            <wire x2="2080" y1="1168" y2="1168" x1="1024" />
+        </branch>
+        <branch name="DRY(15:0)">
+            <wire x2="1024" y1="1232" y2="1232" x1="1008" />
+            <wire x2="2080" y1="1232" y2="1232" x1="1024" />
+        </branch>
+        <branch name="DRZ(15:0)">
+            <wire x2="1024" y1="1296" y2="1296" x1="1008" />
+            <wire x2="2080" y1="1296" y2="1296" x1="1024" />
+        </branch>
+        <branch name="SDA">
+            <wire x2="1888" y1="240" y2="240" x1="1872" />
+            <wire x2="2080" y1="240" y2="240" x1="1888" />
+        </branch>
+        <branch name="SCL">
+            <wire x2="1888" y1="304" y2="304" x1="1872" />
+            <wire x2="2080" y1="304" y2="304" x1="1888" />
+        </branch>
+        <branch name="NACK">
+            <wire x2="1888" y1="752" y2="752" x1="1872" />
+            <wire x2="2080" y1="752" y2="752" x1="1888" />
+        </branch>
+        <branch name="Reset">
+            <wire x2="336" y1="976" y2="976" x1="240" />
+            <wire x2="480" y1="976" y2="976" x1="336" />
+            <wire x2="336" y1="976" y2="1408" x1="336" />
+            <wire x2="1360" y1="1408" y2="1408" x1="336" />
+            <wire x2="1360" y1="688" y2="1408" x1="1360" />
+            <wire x2="1408" y1="688" y2="688" x1="1360" />
+        </branch>
+        <iomarker fontsize="28" x="2080" y="304" name="SCL" orien="R0" />
+        <iomarker fontsize="28" x="2080" y="240" name="SDA" orien="R0" />
+        <iomarker fontsize="28" x="2080" y="752" name="NACK" orien="R0" />
+        <iomarker fontsize="28" x="2080" y="1376" name="DRDY" orien="R0" />
+        <iomarker fontsize="28" x="2080" y="848" name="DR_New" orien="R0" />
+        <iomarker fontsize="28" x="2080" y="1104" name="ID(23:0)" orien="R0" />
+        <iomarker fontsize="28" x="2080" y="1168" name="DRX(15:0)" orien="R0" />
+        <iomarker fontsize="28" x="2080" y="1232" name="DRY(15:0)" orien="R0" />
+        <iomarker fontsize="28" x="2080" y="1296" name="DRZ(15:0)" orien="R0" />
+        <iomarker fontsize="28" x="256" y="1216" name="OutputRate(2:0)" orien="R180" />
+        <iomarker fontsize="28" x="256" y="1056" name="Clk" orien="R180" />
+        <iomarker fontsize="28" x="240" y="976" name="Reset" orien="R180" />
+    </sheet>
+</drawing>

ucisw2_magnetometr/MagnetoHMC5883LCtrl.sym

@@ -0,0 +1,50 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<symbol version="7" name="MagnetoHMC5883LCtrl">
+    <symboltype>BLOCK</symboltype>
+    <timestamp>2018-5-25T11:43:31</timestamp>
+    <pin polarity="Input" x="0" y="-480" name="OutputRate(2:0)" />
+    <pin polarity="Input" x="0" y="-336" name="Clk" />
+    <pin polarity="Input" x="0" y="-192" name="Reset" />
+    <pin polarity="Input" x="0" y="-48" name="DRDY" />
+    <pin polarity="Output" x="432" y="-480" name="DR_New" />
+    <pin polarity="Output" x="432" y="-416" name="ID(23:0)" />
+    <pin polarity="Output" x="432" y="-352" name="DRX(15:0)" />
+    <pin polarity="Output" x="432" y="-288" name="DRY(15:0)" />
+    <pin polarity="Output" x="432" y="-224" name="DRZ(15:0)" />
+    <pin polarity="Output" x="432" y="-160" name="NACK" />
+    <pin polarity="BiDirectional" x="432" y="-96" name="SDA" />
+    <pin polarity="BiDirectional" x="432" y="-32" name="SCL" />
+    <graph>
+        <rect width="304" x="64" y="-512" height="512" />
+        <attrtext style="alignment:BCENTER;fontsize:56;fontname:Arial" attrname="SymbolName" x="216" y="-520" type="symbol" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-480" type="pin OutputRate(2:0)" />
+        <rect width="64" x="0" y="-492" height="24" />
+        <line x2="0" y1="-480" y2="-480" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-336" type="pin Clk" />
+        <line x2="0" y1="-336" y2="-336" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-192" type="pin Reset" />
+        <line x2="0" y1="-192" y2="-192" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-48" type="pin DRDY" />
+        <line x2="0" y1="-48" y2="-48" x1="64" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="360" y="-480" type="pin DR_New" />
+        <line x2="432" y1="-480" y2="-480" x1="368" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="360" y="-416" type="pin ID(23:0)" />
+        <rect width="64" x="368" y="-428" height="24" />
+        <line x2="432" y1="-416" y2="-416" x1="368" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="360" y="-352" type="pin DRX(15:0)" />
+        <rect width="64" x="368" y="-364" height="24" />
+        <line x2="432" y1="-352" y2="-352" x1="368" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="360" y="-288" type="pin DRY(15:0)" />
+        <rect width="64" x="368" y="-300" height="24" />
+        <line x2="432" y1="-288" y2="-288" x1="368" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="360" y="-224" type="pin DRZ(15:0)" />
+        <rect width="64" x="368" y="-236" height="24" />
+        <line x2="432" y1="-224" y2="-224" x1="368" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="360" y="-160" type="pin NACK" />
+        <line x2="432" y1="-160" y2="-160" x1="368" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="360" y="-96" type="pin SDA" />
+        <line x2="432" y1="-96" y2="-96" x1="368" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="360" y="-32" type="pin SCL" />
+        <line x2="432" y1="-32" y2="-32" x1="368" />
+    </graph>
+</symbol>

ucisw2_magnetometr/MagnetoHMC5883LCtrl.vhf

@@ -0,0 +1,135 @@
+--------------------------------------------------------------------------------
+-- Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
+--------------------------------------------------------------------------------
+--   ____  ____ 
+--  /   /\/   / 
+-- /___/  \  /    Vendor: Xilinx 
+-- \   \   \/     Version : 14.7
+--  \   \         Application : sch2hdl
+--  /   /         Filename : MagnetoHMC5883LCtrl.vhf
+-- /___/   /\     Timestamp : 05/28/2018 20:43:29
+-- \   \  /  \ 
+--  \___\/\___\ 
+--
+--Command: sch2hdl -intstyle ise -family spartan6 -flat -suppress -vhdl D:/XilinxPrj/ucisw2_magnetometr/MagnetoHMC5883LCtrl.vhf -w D:/XilinxPrj/ucisw2_magnetometr/MagnetoHMC5883LCtrl.sch
+--Design Name: MagnetoHMC5883LCtrl
+--Device: spartan6
+--Purpose:
+--    This vhdl netlist is translated from an ECS schematic. It can be 
+--    synthesized and simulated, but it should not be modified. 
+--
+
+library ieee;
+use ieee.std_logic_1164.ALL;
+use ieee.numeric_std.ALL;
+library UNISIM;
+use UNISIM.Vcomponents.ALL;
+
+entity MagnetoHMC5883LCtrl is
+   port ( Clk        : in    std_logic; 
+          DRDY       : in    std_logic; 
+          OutputRate : in    std_logic_vector (2 downto 0); 
+          Reset      : in    std_logic; 
+          DRX        : out   std_logic_vector (15 downto 0); 
+          DRY        : out   std_logic_vector (15 downto 0); 
+          DRZ        : out   std_logic_vector (15 downto 0); 
+          DR_New     : out   std_logic; 
+          ID         : out   std_logic_vector (23 downto 0); 
+          NACK       : out   std_logic; 
+          SCL        : inout std_logic; 
+          SDA        : inout std_logic);
+end MagnetoHMC5883LCtrl;
+
+architecture BEHAVIORAL of MagnetoHMC5883LCtrl is
+   signal XLXN_4     : std_logic;
+   signal XLXN_5     : std_logic;
+   signal XLXN_6     : std_logic;
+   signal XLXN_27    : std_logic_vector (7 downto 0);
+   signal XLXN_28    : std_logic_vector (7 downto 0);
+   signal XLXN_29    : std_logic_vector (3 downto 0);
+   signal XLXN_52    : std_logic;
+   signal XLXN_54    : std_logic;
+   signal XLXN_55    : std_logic;
+   signal XLXN_57    : std_logic_vector (7 downto 0);
+   component I2C_Master
+      port ( Go         : in    std_logic; 
+             Address    : in    std_logic_vector (7 downto 0); 
+             ReadCnt    : in    std_logic_vector (3 downto 0); 
+             SDA        : inout std_logic; 
+             SCL        : inout std_logic; 
+             FIFO_Pop   : in    std_logic; 
+             FIFO_Push  : in    std_logic; 
+             FIFO_DI    : in    std_logic_vector (7 downto 0); 
+             FIFO_Empty : out   std_logic; 
+             FIFO_Full  : out   std_logic; 
+             FIFO_DO    : out   std_logic_vector (7 downto 0); 
+             Reset      : in    std_logic; 
+             Clk        : in    std_logic; 
+             Busy       : out   std_logic; 
+             NACK       : out   std_logic);
+   end component;
+   
+   component Magneto_Drv
+      port ( I2C_FIFO_Empty : in    std_logic; 
+             I2C_FIFO_Full  : in    std_logic; 
+             I2C_Busy       : in    std_logic; 
+             DRDY           : in    std_logic; 
+             Reset          : in    std_logic; 
+             Clk            : in    std_logic; 
+             I2C_FIFO_DO    : in    std_logic_vector (7 downto 0); 
+             OutputRate     : in    std_logic_vector (2 downto 0); 
+             I2C_Go         : out   std_logic; 
+             I2C_FIFO_Push  : out   std_logic; 
+             I2C_FIFO_Pop   : out   std_logic; 
+             DR_New         : out   std_logic; 
+             I2C_FIFO_DI    : out   std_logic_vector (7 downto 0); 
+             I2C_Addr       : out   std_logic_vector (7 downto 0); 
+             I2C_ReadCnt    : out   std_logic_vector (3 downto 0); 
+             ID             : out   std_logic_vector (23 downto 0); 
+             DRX            : out   std_logic_vector (15 downto 0); 
+             DRY            : out   std_logic_vector (15 downto 0); 
+             DRZ            : out   std_logic_vector (15 downto 0));
+   end component;
+   
+begin
+   I2CCtrl : I2C_Master
+      port map (Address(7 downto 0)=>XLXN_28(7 downto 0),
+                Clk=>Clk,
+                FIFO_DI(7 downto 0)=>XLXN_27(7 downto 0),
+                FIFO_Pop=>XLXN_6,
+                FIFO_Push=>XLXN_5,
+                Go=>XLXN_4,
+                ReadCnt(3 downto 0)=>XLXN_29(3 downto 0),
+                Reset=>Reset,
+                Busy=>XLXN_55,
+                FIFO_DO(7 downto 0)=>XLXN_57(7 downto 0),
+                FIFO_Empty=>XLXN_52,
+                FIFO_Full=>XLXN_54,
+                NACK=>NACK,
+                SCL=>SCL,
+                SDA=>SDA);
+   
+   MagnetoInterface : Magneto_Drv
+      port map (Clk=>Clk,
+                DRDY=>DRDY,
+                I2C_Busy=>XLXN_55,
+                I2C_FIFO_DO(7 downto 0)=>XLXN_57(7 downto 0),
+                I2C_FIFO_Empty=>XLXN_52,
+                I2C_FIFO_Full=>XLXN_54,
+                OutputRate(2 downto 0)=>OutputRate(2 downto 0),
+                Reset=>Reset,
+                DRX(15 downto 0)=>DRX(15 downto 0),
+                DRY(15 downto 0)=>DRY(15 downto 0),
+                DRZ(15 downto 0)=>DRZ(15 downto 0),
+                DR_New=>DR_New,
+                ID(23 downto 0)=>ID(23 downto 0),
+                I2C_Addr(7 downto 0)=>XLXN_28(7 downto 0),
+                I2C_FIFO_DI(7 downto 0)=>XLXN_27(7 downto 0),
+                I2C_FIFO_Pop=>XLXN_6,
+                I2C_FIFO_Push=>XLXN_5,
+                I2C_Go=>XLXN_4,
+                I2C_ReadCnt(3 downto 0)=>XLXN_29(3 downto 0));
+   
+end BEHAVIORAL;
+
+

ucisw2_magnetometr/Magneto_Drv.spl

@@ -0,0 +1,19 @@
+[Inputs]
+I2C_FIFO_Empty
+I2C_FIFO_Full
+I2C_Busy
+DRDY
+Disp_Busy
+Start
+Reset
+Clk
+=I2C_FIFO_DO[7:0]=
+[Outputs]
+I2C_Go
+I2C_FIFO_Push
+I2C_FIFO_Pop
+Disp_Start
+=I2C_FIFO_DI[7:0]=
+=I2C_Addr[7:0]=
+=I2C_ReadCnt[3:0]=
+[BiDir]

ucisw2_magnetometr/Magneto_Drv.sym

@@ -0,0 +1,75 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<symbol version="7" name="Magneto_Drv">
+    <symboltype>BLOCK</symboltype>
+    <timestamp>2018-4-17T13:58:10</timestamp>
+    <pin polarity="Input" x="0" y="-672" name="I2C_FIFO_Empty" />
+    <pin polarity="Input" x="0" y="-592" name="I2C_FIFO_Full" />
+    <pin polarity="Input" x="0" y="-512" name="I2C_Busy" />
+    <pin polarity="Input" x="0" y="-432" name="DRDY" />
+    <pin polarity="Input" x="0" y="-352" name="Reset" />
+    <pin polarity="Input" x="0" y="-272" name="Clk" />
+    <pin polarity="Input" x="0" y="-192" name="I2C_FIFO_DO(7:0)" />
+    <pin polarity="Input" x="0" y="-112" name="OutputRate(2:0)" />
+    <pin polarity="Output" x="528" y="-672" name="I2C_Go" />
+    <pin polarity="Output" x="528" y="-608" name="I2C_FIFO_Push" />
+    <pin polarity="Output" x="528" y="-544" name="I2C_FIFO_Pop" />
+    <pin polarity="Output" x="528" y="-480" name="DR_New" />
+    <pin polarity="Output" x="528" y="-416" name="I2C_FIFO_DI(7:0)" />
+    <pin polarity="Output" x="528" y="-352" name="I2C_Addr(7:0)" />
+    <pin polarity="Output" x="528" y="-288" name="I2C_ReadCnt(3:0)" />
+    <pin polarity="Output" x="528" y="-224" name="ID(23:0)" />
+    <pin polarity="Output" x="528" y="-160" name="DRX(15:0)" />
+    <pin polarity="Output" x="528" y="-96" name="DRY(15:0)" />
+    <pin polarity="Output" x="528" y="-32" name="DRZ(15:0)" />
+    <graph>
+        <rect width="400" x="64" y="-704" height="704" />
+        <attrtext style="alignment:BCENTER;fontsize:56;fontname:Arial" attrname="SymbolName" x="264" y="-712" type="symbol" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-672" type="pin I2C_FIFO_Empty" />
+        <line x2="0" y1="-672" y2="-672" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-592" type="pin I2C_FIFO_Full" />
+        <line x2="0" y1="-592" y2="-592" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-512" type="pin I2C_Busy" />
+        <line x2="0" y1="-512" y2="-512" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-432" type="pin DRDY" />
+        <line x2="0" y1="-432" y2="-432" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-352" type="pin Reset" />
+        <line x2="0" y1="-352" y2="-352" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-272" type="pin Clk" />
+        <line x2="0" y1="-272" y2="-272" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-192" type="pin I2C_FIFO_DO(7:0)" />
+        <rect width="64" x="0" y="-204" height="24" />
+        <line x2="0" y1="-192" y2="-192" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-112" type="pin OutputRate(2:0)" />
+        <rect width="64" x="0" y="-124" height="24" />
+        <line x2="0" y1="-112" y2="-112" x1="64" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-672" type="pin I2C_Go" />
+        <line x2="528" y1="-672" y2="-672" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-608" type="pin I2C_FIFO_Push" />
+        <line x2="528" y1="-608" y2="-608" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-544" type="pin I2C_FIFO_Pop" />
+        <line x2="528" y1="-544" y2="-544" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-480" type="pin DR_New" />
+        <line x2="528" y1="-480" y2="-480" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-416" type="pin I2C_FIFO_DI(7:0)" />
+        <rect width="64" x="464" y="-428" height="24" />
+        <line x2="528" y1="-416" y2="-416" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-352" type="pin I2C_Addr(7:0)" />
+        <rect width="64" x="464" y="-364" height="24" />
+        <line x2="528" y1="-352" y2="-352" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-288" type="pin I2C_ReadCnt(3:0)" />
+        <rect width="64" x="464" y="-300" height="24" />
+        <line x2="528" y1="-288" y2="-288" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-224" type="pin ID(23:0)" />
+        <rect width="64" x="464" y="-236" height="24" />
+        <line x2="528" y1="-224" y2="-224" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-160" type="pin DRX(15:0)" />
+        <rect width="64" x="464" y="-172" height="24" />
+        <line x2="528" y1="-160" y2="-160" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-96" type="pin DRY(15:0)" />
+        <rect width="64" x="464" y="-108" height="24" />
+        <line x2="528" y1="-96" y2="-96" x1="464" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="456" y="-32" type="pin DRZ(15:0)" />
+        <rect width="64" x="464" y="-44" height="24" />
+        <line x2="528" y1="-32" y2="-32" x1="464" />
+    </graph>
+</symbol>

ucisw2_magnetometr/Magneto_Drv.vhd

@@ -0,0 +1,310 @@
+----------------------------------------------------------------------------------
+-- Company: 
+-- Engineer: 
+-- 
+-- Create Date:    17:16:45 02/27/2018 
+-- Design Name: 
+-- Module Name:    Magneto_Drv - Behavioral 
+-- Project Name: 
+-- Target Devices: 
+-- Tool versions: 
+-- Description: 
+--
+-- Dependencies: 
+--
+-- Revision: 
+-- Revision 0.01 - File Created
+-- Additional Comments: 
+--
+----------------------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+
+-- Uncomment the following library declaration if using
+-- arithmetic functions with Signed or Unsigned values
+use IEEE.NUMERIC_STD.ALL;
+
+-- Uncomment the following library declaration if instantiating
+-- any Xilinx primitives in this code.
+--library UNISIM;
+--use UNISIM.VComponents.all;
+
+entity Magneto_Drv is
+    Port ( I2C_FIFO_Empty : in  STD_LOGIC;
+           I2C_FIFO_Full : in  STD_LOGIC;
+           I2C_FIFO_DO : in  STD_LOGIC_VECTOR (7 downto 0);
+           I2C_Busy : in  STD_LOGIC;
+           DRDY : in  STD_LOGIC;
+           OutputRate : in STD_LOGIC_VECTOR (2 downto 0); 
+           Reset : in  STD_LOGIC;
+           Clk : in  STD_LOGIC;
+           I2C_Go : out  STD_LOGIC;
+           I2C_FIFO_Push : out  STD_LOGIC;
+           I2C_FIFO_Pop : out  STD_LOGIC;
+           I2C_FIFO_DI : out  STD_LOGIC_VECTOR (7 downto 0);
+           I2C_Addr : out  STD_LOGIC_VECTOR (7 downto 0);
+           I2C_ReadCnt : out  STD_LOGIC_VECTOR (3 downto 0);
+           ID : out  STD_LOGIC_VECTOR (23 downto 0);
+           DRX : out  STD_LOGIC_VECTOR (15 downto 0);
+           DRY : out  STD_LOGIC_VECTOR (15 downto 0);
+           DRZ : out  STD_LOGIC_VECTOR (15 downto 0);
+           DR_New : out  STD_LOGIC);
+end Magneto_Drv;
+
+architecture Behavioral of Magneto_Drv is
+	-- Main state machine
+   type state_type is ( Init, PushAddrID, SendAddrID, BusyAddrID, ReceiveID, BusyID, ReadID, PopID, CheckID, 
+                        PushAddrConfigA, PushDataConfigA, SendConfigA, BusyConfigA, PushAddrMode, PushDataMode, 
+                        SendMode, BusyMode, MeasureWait, MeasureReceive, MeasureBusy, MeasureRead, MeasurePop, 
+                        MeasureCheck, MeasureLoad, MeasureOutput, MeasurePushAddr, MeasureSendAddr, MeasureBusyAddr  );
+	signal state, next_state : state_type;
+   
+	-- DRDY synchronized input
+	signal DRDY_in : STD_LOGIC;
+	
+	-- Input registers
+   signal ID_reg : STD_LOGIC_VECTOR (23 downto 0);
+   signal Input : STD_LOGIC_VECTOR (47 downto 0);
+   
+   -- Input byte counter
+	signal bytes : integer range 0 to 5 := 0;
+   
+   -- Measure output registers
+   signal DRX_reg : STD_LOGIC_VECTOR (15 downto 0);
+   signal DRY_reg : STD_LOGIC_VECTOR (15 downto 0);
+   signal DRZ_reg : STD_LOGIC_VECTOR (15 downto 0);
+
+begin
+	-- DRDY input synchronization to internal clock
+	sync_process : process(Clk, Reset)
+	begin
+		if Reset = '1' then
+			DRDY_in <= '0';
+		elsif rising_edge(Clk) then
+			DRDY_in <= DRDY;
+		end if;
+	end process sync_process;
+
+	-- Main HMC5883L FSM
+	-- (continuos measurement)
+   process1 : process(Clk)
+	begin
+		if rising_edge(Clk) then
+			if Reset = '1' then
+				state <= Init;
+			else
+				state <= next_state;
+			end if;
+		end if;
+	end process process1;
+   
+	process2 : process(state, I2C_FIFO_Empty, I2C_Busy, DRDY_in)
+	begin
+		next_state <= state; -- by default
+		
+		case state is
+         -- Initialization
+         -- Reading identification register
+			when Init =>
+					next_state <= PushAddrID;
+			when PushAddrID =>
+				next_state <= SendAddrID;
+			when SendAddrID =>
+				next_state <= BusyAddrID;
+			when BusyAddrID =>
+				if I2C_Busy = '0' then
+					next_state <= ReceiveID;
+				end if;
+			when ReceiveID =>
+				next_state <= BusyID;
+			when BusyID =>
+				if I2C_Busy = '0' then
+					next_state <= ReadID;
+				end if;
+         when ReadID =>
+            next_state <= PopID;
+         when PopID =>
+            next_state <= CheckID;
+         when CheckID =>
+            if I2C_FIFO_Empty = '1' then
+					next_state <= PushAddrConfigA;
+            else
+					next_state <= ReadID;
+				end if;
+         -- Setting data rate and mode
+         when PushAddrConfigA =>
+				next_state <= PushDataConfigA;
+         when PushDataConfigA =>   
+            next_state <= SendConfigA;
+			when SendConfigA =>
+				next_state <= BusyConfigA;
+			when BusyConfigA =>
+				if I2C_Busy = '0' then
+					next_state <= PushAddrMode;
+				end if;
+         when PushAddrMode =>
+				next_state <= PushDataMode;
+         when PushDataMode =>   
+            next_state <= SendMode;
+			when SendMode =>
+				next_state <= BusyMode;
+			when BusyMode =>
+				if I2C_Busy = '0' then
+					next_state <= MeasureWait;
+				end if;
+         -- Measuring...
+         when MeasureWait =>
+				if DRDY_in = '0' then
+					next_state <= MeasureReceive;
+				end if;
+         when MeasureReceive =>
+				next_state <= MeasureBusy;
+         when MeasureBusy =>
+				if I2C_Busy = '0' then
+					next_state <= MeasureRead;
+				end if;
+         -- Reading results...
+         when MeasureRead =>
+				next_state <= MeasurePop;
+			when MeasurePop =>
+				next_state <= MeasureCheck; --
+			when MeasureCheck =>
+				if I2C_FIFO_Empty = '1' then
+					next_state <= MeasureLoad;
+            else
+					next_state <= MeasureRead;
+				end if;
+         when MeasureLoad =>
+            next_state <= MeasureOutput;
+         when MeasureOutput =>
+            next_state <= MeasurePushAddr;
+         when MeasurePushAddr =>
+            next_state <= MeasureSendAddr;
+         when MeasureSendAddr =>
+            next_state <= MeasureBusyAddr;
+         when MeasureBusyAddr =>
+            if I2C_Busy = '0' then
+					next_state <= MeasureWait;
+				end if;
+		end case;
+	end process process2;
+	
+   id_register : process(Clk, state, next_state)
+	begin
+	   if rising_edge(Clk) then
+			if state = ReadID then
+            case bytes is
+               when 0 =>
+                  ID_reg(23 downto 16) <= I2C_FIFO_DO;
+               when 1 =>
+                  ID_reg(15 downto 8) <= I2C_FIFO_DO;
+               when 2 =>
+                  ID_reg(7 downto 0) <= I2C_FIFO_DO;
+               when others =>
+                  ID_reg <= X"000000";
+            end case;
+			end if;
+		end if;
+	end process id_register;
+   
+	-- Storing measurements in register
+	input_register : process(Clk, state, next_state)
+	begin
+	   if rising_edge(Clk) then
+			if state = MeasureRead then
+            case bytes is
+               when 0 =>
+                  Input(47 downto 40) <= I2C_FIFO_DO;
+               when 1 =>
+                  Input(39 downto 32) <= I2C_FIFO_DO;
+               when 2 =>
+                  Input(31 downto 24) <= I2C_FIFO_DO;
+               when 3 =>
+                  Input(23 downto 16) <= I2C_FIFO_DO;
+               when 4 =>
+                  Input(15 downto 8) <= I2C_FIFO_DO;
+               when 5 =>
+                  Input(7 downto 0) <= I2C_FIFO_DO;
+            end case;
+			end if;
+		end if;
+	end process input_register;
+   
+   -- Stored bytes counter
+   byte_counter : process(Clk)
+	begin
+		if rising_edge(Clk) then
+			if Reset = '1' then
+				bytes <= 0;
+			end if;
+			if state = MeasurePop then
+				if bytes = 5 then
+					bytes <= 0;
+				else
+					bytes <= bytes + 1;
+				end if;
+			end if;
+			if state = PopID then
+				if bytes = 2 then
+					bytes <= 0;
+				else
+					bytes <= bytes + 1;
+				end if;
+			end if;
+		end if;
+	end process byte_counter;
+   
+   -- Buffering output in registers
+	output_sync : process(Clk, state, next_state)
+	begin
+	   if rising_edge(Clk) then
+			if state = MeasureLoad then
+				DRX_reg <= Input(47 downto 32);
+				DRZ_reg <= Input(31 downto 16);
+				DRY_reg <= Input(15 downto 0);
+			end if;
+		end if;
+	end process output_sync;
+   
+   -- Output signals for FSM
+	I2C_FIFO_DI <=	X"0A" when next_state = PushAddrID or state = PushAddrID else
+						X"00" when next_state = PushAddrConfigA or state = PushAddrConfigA else
+						"000" & OutputRate & "00" when next_state = PushDataConfigA or state = PushDataConfigA else
+						X"02" when next_state = PushAddrMode or state = PushAddrMode else
+						X"00" when next_state = PushDataMode or state = PushDataMode else
+						X"03" when next_state = MeasurePushAddr or state = MeasurePushAddr else
+						X"00";
+
+	I2C_FIFO_Push <=	'1' when state = PushAddrID or state = PushAddrConfigA or state = PushDataConfigA
+								or state = PushAddrMode or state = PushDataMode or state = MeasurePushAddr	else
+							'0';
+										
+	I2C_Addr <=	X"3C" when next_state = SendAddrID or state = SendAddrID or next_state = SendConfigA
+						or state = SendConfigA or next_state = SendMode or state = SendMode
+						or next_state = MeasureSendAddr or state = MeasureSendAddr else
+					X"3D" when next_state = ReceiveID or state = ReceiveID or next_state = MeasureReceive
+						or state = MeasureReceive else
+					X"00";
+									
+	I2C_Go <=	'1' when state = SendAddrID or state = ReceiveID or state = SendConfigA or state = SendMode
+						or state = MeasureReceive or state = MeasureSendAddr	else
+					'0';
+					
+	I2C_ReadCnt <=	X"3" when next_state = ReceiveID or state = ReceiveID else
+						X"6" when next_state = MeasureReceive or state = MeasureReceive else
+						X"0";
+						
+	I2C_FIFO_Pop <=	'1' when state = PopID or state = MeasurePop	else
+							'0';
+							
+   DR_New <=	'1' when state = MeasureOutput else
+					'0';
+   
+	-- Output registers
+   ID <= ID_reg;
+   DRX <= DRX_reg;
+   DRY <= DRY_reg;
+   DRZ <= DRZ_reg;
+
+end Behavioral;
+

ucisw2_magnetometr/Magneto_J3.ucf

@@ -0,0 +1,4 @@
+# Magnetometer GY-273 connected to Header J3 (Espier III board)
+NET "DRDY" LOC = "P24" | SLEW = SLOW | DRIVE = 6;  # shared with PS2_CLK
+NET "SDA"  LOC = "P57" | SLEW = SLOW | DRIVE = 6;
+NET "SCL"  LOC = "P58" | SLEW = SLOW | DRIVE = 6;

ucisw2_magnetometr/VGACompass.spl

@@ -0,0 +1,12 @@
+[Inputs]
+Reset
+Clk
+=DRX[15:0]=
+=DRY[15:0]=
+[Outputs]
+H_SYNC
+V_SYNC
+=V_R[4:0]=
+=V_G[5:0]=
+=V_B[4:0]=
+[BiDir]

ucisw2_magnetometr/VGACompass.sym

@@ -0,0 +1,41 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<symbol version="7" name="VGACompass">
+    <symboltype>BLOCK</symboltype>
+    <timestamp>2018-5-28T23:28:4</timestamp>
+    <pin polarity="Input" x="0" y="-288" name="Reset" />
+    <pin polarity="Input" x="0" y="-208" name="Clk" />
+    <pin polarity="Input" x="0" y="-128" name="DRX(15:0)" />
+    <pin polarity="Input" x="0" y="-48" name="DRY(15:0)" />
+    <pin polarity="Output" x="384" y="-288" name="H_SYNC" />
+    <pin polarity="Output" x="384" y="-224" name="V_SYNC" />
+    <pin polarity="Output" x="384" y="-160" name="V_R(4:0)" />
+    <pin polarity="Output" x="384" y="-96" name="V_G(5:0)" />
+    <pin polarity="Output" x="384" y="-32" name="V_B(4:0)" />
+    <graph>
+        <rect width="256" x="64" y="-320" height="320" />
+        <attrtext style="alignment:BCENTER;fontsize:56;fontname:Arial" attrname="SymbolName" x="192" y="-328" type="symbol" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-288" type="pin Reset" />
+        <line x2="0" y1="-288" y2="-288" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-208" type="pin Clk" />
+        <line x2="0" y1="-208" y2="-208" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-128" type="pin DRX(15:0)" />
+        <rect width="64" x="0" y="-140" height="24" />
+        <line x2="0" y1="-128" y2="-128" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-48" type="pin DRY(15:0)" />
+        <rect width="64" x="0" y="-60" height="24" />
+        <line x2="0" y1="-48" y2="-48" x1="64" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-288" type="pin H_SYNC" />
+        <line x2="384" y1="-288" y2="-288" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-224" type="pin V_SYNC" />
+        <line x2="384" y1="-224" y2="-224" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-160" type="pin V_R(4:0)" />
+        <rect width="64" x="320" y="-172" height="24" />
+        <line x2="384" y1="-160" y2="-160" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-96" type="pin V_G(5:0)" />
+        <rect width="64" x="320" y="-108" height="24" />
+        <line x2="384" y1="-96" y2="-96" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-32" type="pin V_B(4:0)" />
+        <rect width="64" x="320" y="-44" height="24" />
+        <line x2="384" y1="-32" y2="-32" x1="320" />
+    </graph>
+</symbol>

ucisw2_magnetometr/VGACompass.vhd

@@ -0,0 +1,163 @@
+----------------------------------------------------------------------------------
+-- Company: 
+-- Engineer: 
+-- 
+-- Create Date:    13:11:03 05/28/2018 
+-- Design Name: 
+-- Module Name:    VGACompass - Behavioral 
+-- Project Name: 
+-- Target Devices: 
+-- Tool versions: 
+-- Description: 
+--
+-- Dependencies: 
+--
+-- Revision: 
+-- Revision 0.01 - File Created
+-- Additional Comments: 
+--
+----------------------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+
+-- Uncomment the following library declaration if using
+-- arithmetic functions with Signed or Unsigned values
+use IEEE.NUMERIC_STD.ALL;
+
+-- Uncomment the following library declaration if instantiating
+-- any Xilinx primitives in this code.
+--library UNISIM;
+--use UNISIM.VComponents.all;
+
+entity VGACompass is
+    Port ( DRX : in  STD_LOGIC_VECTOR (15 downto 0);
+           DRY : in  STD_LOGIC_VECTOR (15 downto 0);
+           Reset : in  STD_LOGIC;
+           Clk : in  STD_LOGIC;
+           V_R : out  STD_LOGIC_VECTOR (4 downto 0);
+           V_G : out  STD_LOGIC_VECTOR (5 downto 0);
+           V_B : out  STD_LOGIC_VECTOR (4 downto 0);
+           H_SYNC : out  STD_LOGIC;
+           V_SYNC : out  STD_LOGIC);
+end VGACompass;
+
+architecture Behavioral of VGACompass is
+	constant h_pulse : integer := 80;		-- Horiztonal sync pulse width in pixels
+	constant h_bp : integer := 160;			-- Horiztonal back porch width in pixels
+	constant h_pixels : integer := 800;		-- Horiztonal display width in pixels
+	constant h_fp : integer := 16;			-- Horiztonal front porch width in pixels
+	constant h_pol : STD_LOGIC := '1';		-- Horizontal sync pulse polarity (1 = positive, 0 = negative)
+	constant v_pulse : integer := 3;			-- Vertical sync pulse width in rows
+	constant v_bp : integer := 21;			-- Vertical back porch width in rows
+	constant v_pixels	: integer := 600;		-- Vertical display width in rows
+	constant v_fp : integer := 1;				-- Vertical front porch width in rows
+	constant v_pol : STD_LOGIC := '1';		-- Vertical sync pulse polarity (1 = positive, 0 = negative)
+	constant	h_period	: integer := h_pulse + h_bp + h_pixels + h_fp;		-- Total number of pixel clocks in a row
+	constant	v_period	: integer := v_pulse + v_bp + v_pixels + v_fp;		-- Total number of rows in column
+	
+	signal disp_ena :	STD_LOGIC;		-- Display enable ('1' = display time, '0' = blanking time)
+	signal column : integer;			-- Horizontal pixel coordinate
+	signal row : integer;				-- Vertical pixel coordinate
+	
+	signal DataX : signed (15 downto 0) := signed(DRX);
+	signal DataY : signed (15 downto 0) := signed(DRY);
+	signal Color : unsigned (15 downto 0) := unsigned((abs(DataX) + abs(DataY)) / 2);
+
+begin
+	process(Clk, Reset)
+		variable h_count : integer range 0 to h_period - 1 := 0;  -- Horizontal counter (counts the columns)
+		variable v_count : integer range 0 to v_period - 1 := 0;  -- Vertical counter (counts the rows)
+		
+	begin
+		if rising_edge(Clk) then
+			if(Reset = '1') then			-- Reset asserted
+				h_count := 0;				-- Reset horizontal counter
+				v_count := 0;				-- Reset vertical counter
+				H_SYNC <= not h_pol;		-- Deassert horizontal sync
+				V_SYNC <= not v_pol;		-- Deassert vertical sync
+				disp_ena <= '0';			-- Disable display
+				column <= 0;				-- Reset column pixel coordinate
+				row <= 0;					-- Reset row pixel coordinate
+			end if;
+			
+			-- Counters
+			if(h_count < h_period - 1) then
+				-- Horizontal counter (pixels)
+				h_count := h_count + 1;
+			else
+				h_count := 0;
+				if(v_count < v_period - 1) then
+					-- Veritcal counter (rows)
+					v_count := v_count + 1;
+				else
+					v_count := 0;
+				end if;
+			end if;
+
+			-- Horizontal sync signal
+			if(h_count < h_pixels + h_fp or h_count >= h_pixels + h_fp + h_pulse) then
+				H_SYNC <= not h_pol;		-- Deassert horiztonal sync pulse
+			else
+				H_SYNC <= h_pol;			-- Assert horiztonal sync pulse
+			end if;
+			
+			-- Vertical sync signal
+			if(v_count < v_pixels + v_fp or v_count >= v_pixels + v_fp + v_pulse) then
+				V_SYNC <= not v_pol;		-- Deassert vertical sync pulse
+			else
+				V_SYNC <= v_pol;			-- Assert vertical sync pulse
+			end if;
+			
+			-- Set pixel coordinates
+			if(h_count < h_pixels) then  	-- Horiztonal display time
+				column <= h_count;			-- Set horiztonal pixel coordinate
+			end if;
+			if(v_count < v_pixels) then	-- Vertical display time
+				row <= v_count;				-- Set vertical pixel coordinate
+			end if;
+
+			-- Set display enable signal
+			if(h_count < h_pixels and v_count < v_pixels) then
+				-- Display time
+				disp_ena <= '1';
+			else
+				-- Blanking time
+				disp_ena <= '0';
+			end if;
+		end if;
+	end process;
+
+	process(disp_ena, row, column, DataX, DataY, Color)
+	begin
+		if(disp_ena = '1') then
+			-- Display time
+			if(row > 295 - shift_right(DataX, 3) and column > 395 - shift_right(DataY, 3) and row < 305 - shift_right(DataX, 3) and column < 405 - shift_right(DataY, 3)) then
+				-- Northern marker (red)
+				V_R <= (others => '1');
+				V_G  <= STD_LOGIC_VECTOR(Color(10 downto 5));
+				V_B <= (others => '0');
+			elsif(row > 295 + shift_right(DataX, 3) and column > 395 + shift_right(DataY, 3) and row < 305 + shift_right(DataX, 3) and column < 405 + shift_right(DataY, 3)) then
+				-- Southern marker (blue)
+				V_R <= (others => '0');
+				V_G  <= STD_LOGIC_VECTOR(Color(10 downto 5));
+				V_B <= (others => '1');
+			elsif(row = 300 or column = 400) then
+				-- Axes (yellow)
+				V_R <= (others => '1');
+				V_G  <= (others => '1');
+				V_B <= (others => '0');
+			else
+				-- Background (black)
+				V_R <= (others => '0');
+				V_G  <= (others => '0');
+				V_B <= (others => '0');
+			end if;
+		else
+			-- Blanking time
+			V_R <= (others => '0');
+			V_G <= (others => '0');
+			V_B <= (others => '0');
+		end if;
+	end process;
+end Behavioral;
+

ucisw2_magnetometr/magneto_i2c.jhd

@@ -0,0 +1,7 @@
+MODULE magneto_i2c
+	SUBMODULE MagnetoHMC5883LCtrl
+		INSTANCE MagnetoCtrl
+	SUBMODULE Display4x7S
+		INSTANCE ZAxisDisp
+	SUBMODULE VGACompass
+		INSTANCE CompassDisp

ucisw2_magnetometr/magneto_i2c.sch

@@ -0,0 +1,268 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<drawing version="7">
+    <attr value="spartan6" name="DeviceFamilyName">
+        <trait delete="all:0" />
+        <trait editname="all:0" />
+        <trait edittrait="all:0" />
+    </attr>
+    <netlist>
+        <signal name="CLK" />
+        <signal name="Reset" />
+        <signal name="DRDY" />
+        <signal name="Rate(2:0)" />
+        <signal name="DRLED" />
+        <signal name="DS(7:0)" />
+        <signal name="DS_EN(3:0)" />
+        <signal name="XLXN_278(15:0)" />
+        <signal name="XLXN_264" />
+        <signal name="H_SYNC" />
+        <signal name="V_SYNC" />
+        <signal name="V_R(4:0)" />
+        <signal name="V_G(5:0)" />
+        <signal name="V_B(4:0)" />
+        <signal name="SCL" />
+        <signal name="SDA" />
+        <signal name="NACK" />
+        <signal name="XLXN_94(2:0)" />
+        <signal name="XLXN_110(15:0)" />
+        <signal name="XLXN_111(15:0)" />
+        <port polarity="Input" name="CLK" />
+        <port polarity="Input" name="Reset" />
+        <port polarity="Input" name="DRDY" />
+        <port polarity="Input" name="Rate(2:0)" />
+        <port polarity="Output" name="DRLED" />
+        <port polarity="Output" name="DS(7:0)" />
+        <port polarity="Output" name="DS_EN(3:0)" />
+        <port polarity="Output" name="H_SYNC" />
+        <port polarity="Output" name="V_SYNC" />
+        <port polarity="Output" name="V_R(4:0)" />
+        <port polarity="Output" name="V_G(5:0)" />
+        <port polarity="Output" name="V_B(4:0)" />
+        <port polarity="BiDirectional" name="SCL" />
+        <port polarity="BiDirectional" name="SDA" />
+        <port polarity="Output" name="NACK" />
+        <blockdef name="inv">
+            <timestamp>2000-1-1T10:10:10</timestamp>
+            <line x2="64" y1="-32" y2="-32" x1="0" />
+            <line x2="160" y1="-32" y2="-32" x1="224" />
+            <line x2="128" y1="-64" y2="-32" x1="64" />
+            <line x2="64" y1="-32" y2="0" x1="128" />
+            <line x2="64" y1="0" y2="-64" x1="64" />
+            <circle r="16" cx="144" cy="-32" />
+        </blockdef>
+        <blockdef name="MagnetoHMC5883LCtrl">
+            <timestamp>2018-5-25T11:43:31</timestamp>
+            <rect width="304" x="64" y="-512" height="512" />
+            <rect width="64" x="0" y="-492" height="24" />
+            <line x2="0" y1="-480" y2="-480" x1="64" />
+            <line x2="0" y1="-336" y2="-336" x1="64" />
+            <line x2="0" y1="-192" y2="-192" x1="64" />
+            <line x2="0" y1="-48" y2="-48" x1="64" />
+            <line x2="432" y1="-480" y2="-480" x1="368" />
+            <rect width="64" x="368" y="-428" height="24" />
+            <line x2="432" y1="-416" y2="-416" x1="368" />
+            <rect width="64" x="368" y="-364" height="24" />
+            <line x2="432" y1="-352" y2="-352" x1="368" />
+            <rect width="64" x="368" y="-300" height="24" />
+            <line x2="432" y1="-288" y2="-288" x1="368" />
+            <rect width="64" x="368" y="-236" height="24" />
+            <line x2="432" y1="-224" y2="-224" x1="368" />
+            <line x2="432" y1="-160" y2="-160" x1="368" />
+            <line x2="432" y1="-96" y2="-96" x1="368" />
+            <line x2="432" y1="-32" y2="-32" x1="368" />
+        </blockdef>
+        <blockdef name="buf">
+            <timestamp>2000-1-1T10:10:10</timestamp>
+            <line x2="64" y1="-32" y2="-32" x1="0" />
+            <line x2="128" y1="-32" y2="-32" x1="224" />
+            <line x2="128" y1="0" y2="-32" x1="64" />
+            <line x2="64" y1="-32" y2="-64" x1="128" />
+            <line x2="64" y1="-64" y2="0" x1="64" />
+        </blockdef>
+        <blockdef name="Display4x7S">
+            <timestamp>2018-5-25T12:38:38</timestamp>
+            <rect width="256" x="64" y="-256" height="256" />
+            <line x2="0" y1="-224" y2="-224" x1="64" />
+            <rect width="64" x="0" y="-172" height="24" />
+            <line x2="0" y1="-160" y2="-160" x1="64" />
+            <rect width="64" x="0" y="-108" height="24" />
+            <line x2="0" y1="-96" y2="-96" x1="64" />
+            <rect width="64" x="0" y="-44" height="24" />
+            <line x2="0" y1="-32" y2="-32" x1="64" />
+            <rect width="64" x="320" y="-236" height="24" />
+            <line x2="384" y1="-224" y2="-224" x1="320" />
+            <rect width="64" x="320" y="-44" height="24" />
+            <line x2="384" y1="-32" y2="-32" x1="320" />
+        </blockdef>
+        <blockdef name="VGACompass">
+            <timestamp>2018-5-28T23:28:4</timestamp>
+            <rect width="256" x="64" y="-320" height="320" />
+            <line x2="0" y1="-288" y2="-288" x1="64" />
+            <line x2="0" y1="-208" y2="-208" x1="64" />
+            <rect width="64" x="0" y="-140" height="24" />
+            <line x2="0" y1="-128" y2="-128" x1="64" />
+            <rect width="64" x="0" y="-60" height="24" />
+            <line x2="0" y1="-48" y2="-48" x1="64" />
+            <line x2="384" y1="-288" y2="-288" x1="320" />
+            <line x2="384" y1="-224" y2="-224" x1="320" />
+            <rect width="64" x="320" y="-172" height="24" />
+            <line x2="384" y1="-160" y2="-160" x1="320" />
+            <rect width="64" x="320" y="-108" height="24" />
+            <line x2="384" y1="-96" y2="-96" x1="320" />
+            <rect width="64" x="320" y="-44" height="24" />
+            <line x2="384" y1="-32" y2="-32" x1="320" />
+        </blockdef>
+        <block symbolname="inv" name="XLXI_20(2:0)">
+            <blockpin signalname="Rate(2:0)" name="I" />
+            <blockpin signalname="XLXN_94(2:0)" name="O" />
+        </block>
+        <block symbolname="buf" name="XLXI_19">
+            <blockpin signalname="DRDY" name="I" />
+            <blockpin signalname="DRLED" name="O" />
+        </block>
+        <block symbolname="Display4x7S" name="ZAxisDisp">
+            <blockpin signalname="CLK" name="Clk" />
+            <blockpin signalname="XLXN_278(15:0)" name="DI(15:0)" />
+            <blockpin name="DP(3:0)" />
+            <blockpin name="Blank(3:0)" />
+            <blockpin signalname="DS_EN(3:0)" name="DS_EN(3:0)" />
+            <blockpin signalname="DS(7:0)" name="DS(7:0)" />
+        </block>
+        <block symbolname="MagnetoHMC5883LCtrl" name="MagnetoCtrl">
+            <blockpin signalname="XLXN_94(2:0)" name="OutputRate(2:0)" />
+            <blockpin signalname="CLK" name="Clk" />
+            <blockpin signalname="XLXN_264" name="Reset" />
+            <blockpin signalname="DRDY" name="DRDY" />
+            <blockpin name="DR_New" />
+            <blockpin name="ID(23:0)" />
+            <blockpin signalname="XLXN_110(15:0)" name="DRX(15:0)" />
+            <blockpin signalname="XLXN_111(15:0)" name="DRY(15:0)" />
+            <blockpin signalname="XLXN_278(15:0)" name="DRZ(15:0)" />
+            <blockpin signalname="NACK" name="NACK" />
+            <blockpin signalname="SDA" name="SDA" />
+            <blockpin signalname="SCL" name="SCL" />
+        </block>
+        <block symbolname="inv" name="XLXI_5">
+            <blockpin signalname="Reset" name="I" />
+            <blockpin signalname="XLXN_264" name="O" />
+        </block>
+        <block symbolname="VGACompass" name="CompassDisp">
+            <blockpin signalname="XLXN_264" name="Reset" />
+            <blockpin signalname="CLK" name="Clk" />
+            <blockpin signalname="XLXN_110(15:0)" name="DRX(15:0)" />
+            <blockpin signalname="XLXN_111(15:0)" name="DRY(15:0)" />
+            <blockpin signalname="H_SYNC" name="H_SYNC" />
+            <blockpin signalname="V_SYNC" name="V_SYNC" />
+            <blockpin signalname="V_R(4:0)" name="V_R(4:0)" />
+            <blockpin signalname="V_G(5:0)" name="V_G(5:0)" />
+            <blockpin signalname="V_B(4:0)" name="V_B(4:0)" />
+        </block>
+    </netlist>
+    <sheet sheetnum="1" width="3520" height="2720">
+        <branch name="Reset">
+            <wire x2="208" y1="432" y2="432" x1="176" />
+        </branch>
+        <branch name="DRDY">
+            <wire x2="400" y1="576" y2="576" x1="176" />
+            <wire x2="480" y1="576" y2="576" x1="400" />
+            <wire x2="400" y1="576" y2="1040" x1="400" />
+            <wire x2="1312" y1="1040" y2="1040" x1="400" />
+        </branch>
+        <instance x="208" y="176" name="XLXI_20(2:0)" orien="R0" />
+        <branch name="Rate(2:0)">
+            <wire x2="208" y1="144" y2="144" x1="176" />
+        </branch>
+        <iomarker fontsize="28" x="176" y="144" name="Rate(2:0)" orien="R180" />
+        <iomarker fontsize="28" x="176" y="288" name="CLK" orien="R180" />
+        <iomarker fontsize="28" x="176" y="432" name="Reset" orien="R180" />
+        <iomarker fontsize="28" x="176" y="576" name="DRDY" orien="R180" />
+        <branch name="DRLED">
+            <wire x2="1648" y1="1040" y2="1040" x1="1536" />
+        </branch>
+        <iomarker fontsize="28" x="1648" y="1040" name="DRLED" orien="R0" />
+        <iomarker fontsize="28" x="1648" y="928" name="DS(7:0)" orien="R0" />
+        <iomarker fontsize="28" x="1648" y="736" name="DS_EN(3:0)" orien="R0" />
+        <instance x="1232" y="960" name="ZAxisDisp" orien="R0">
+        </instance>
+        <iomarker fontsize="28" x="1648" y="128" name="H_SYNC" orien="R0" />
+        <iomarker fontsize="28" x="1648" y="192" name="V_SYNC" orien="R0" />
+        <iomarker fontsize="28" x="1648" y="256" name="V_R(4:0)" orien="R0" />
+        <iomarker fontsize="28" x="1648" y="320" name="V_G(5:0)" orien="R0" />
+        <iomarker fontsize="28" x="1648" y="384" name="V_B(4:0)" orien="R0" />
+        <iomarker fontsize="28" x="1648" y="592" name="SCL" orien="R0" />
+        <iomarker fontsize="28" x="1648" y="528" name="SDA" orien="R0" />
+        <iomarker fontsize="28" x="1648" y="464" name="NACK" orien="R0" />
+        <instance x="480" y="624" name="MagnetoCtrl" orien="R0">
+        </instance>
+        <branch name="DS(7:0)">
+            <wire x2="1648" y1="928" y2="928" x1="1616" />
+        </branch>
+        <branch name="DS_EN(3:0)">
+            <wire x2="1648" y1="736" y2="736" x1="1616" />
+        </branch>
+        <branch name="XLXN_278(15:0)">
+            <wire x2="960" y1="400" y2="400" x1="912" />
+            <wire x2="960" y1="400" y2="800" x1="960" />
+            <wire x2="1232" y1="800" y2="800" x1="960" />
+        </branch>
+        <branch name="XLXN_264">
+            <wire x2="464" y1="432" y2="432" x1="432" />
+            <wire x2="480" y1="432" y2="432" x1="464" />
+            <wire x2="464" y1="432" y2="656" x1="464" />
+            <wire x2="992" y1="656" y2="656" x1="464" />
+            <wire x2="1232" y1="128" y2="128" x1="992" />
+            <wire x2="992" y1="128" y2="656" x1="992" />
+        </branch>
+        <branch name="H_SYNC">
+            <wire x2="1648" y1="128" y2="128" x1="1616" />
+        </branch>
+        <branch name="V_SYNC">
+            <wire x2="1648" y1="192" y2="192" x1="1616" />
+        </branch>
+        <branch name="V_R(4:0)">
+            <wire x2="1648" y1="256" y2="256" x1="1616" />
+        </branch>
+        <branch name="V_G(5:0)">
+            <wire x2="1648" y1="320" y2="320" x1="1616" />
+        </branch>
+        <branch name="V_B(4:0)">
+            <wire x2="1648" y1="384" y2="384" x1="1616" />
+        </branch>
+        <branch name="SCL">
+            <wire x2="1648" y1="592" y2="592" x1="912" />
+        </branch>
+        <branch name="SDA">
+            <wire x2="1648" y1="528" y2="528" x1="912" />
+        </branch>
+        <branch name="NACK">
+            <wire x2="1648" y1="464" y2="464" x1="912" />
+        </branch>
+        <branch name="XLXN_94(2:0)">
+            <wire x2="480" y1="144" y2="144" x1="432" />
+        </branch>
+        <branch name="XLXN_110(15:0)">
+            <wire x2="1136" y1="272" y2="272" x1="912" />
+            <wire x2="1136" y1="272" y2="288" x1="1136" />
+            <wire x2="1232" y1="288" y2="288" x1="1136" />
+        </branch>
+        <branch name="XLXN_111(15:0)">
+            <wire x2="1056" y1="336" y2="336" x1="912" />
+            <wire x2="1056" y1="336" y2="368" x1="1056" />
+            <wire x2="1232" y1="368" y2="368" x1="1056" />
+        </branch>
+        <branch name="CLK">
+            <wire x2="432" y1="288" y2="288" x1="176" />
+            <wire x2="432" y1="288" y2="688" x1="432" />
+            <wire x2="1024" y1="688" y2="688" x1="432" />
+            <wire x2="1024" y1="688" y2="736" x1="1024" />
+            <wire x2="1232" y1="736" y2="736" x1="1024" />
+            <wire x2="480" y1="288" y2="288" x1="432" />
+            <wire x2="1024" y1="208" y2="688" x1="1024" />
+            <wire x2="1232" y1="208" y2="208" x1="1024" />
+        </branch>
+        <instance x="208" y="464" name="XLXI_5" orien="R0" />
+        <instance x="1312" y="1072" name="XLXI_19" orien="R0" />
+        <instance x="1232" y="416" name="CompassDisp" orien="R0">
+        </instance>
+    </sheet>
+</drawing>

ucisw2_magnetometr/magneto_i2c.sym

@@ -0,0 +1,53 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<symbol version="7" name="magneto_i2c">
+    <symboltype>BLOCK</symboltype>
+    <timestamp>2018-5-26T13:14:4</timestamp>
+    <pin polarity="Input" x="0" y="-608" name="Reset" />
+    <pin polarity="Input" x="0" y="-320" name="CLK" />
+    <pin polarity="Input" x="0" y="-32" name="DRDY" />
+    <pin polarity="Output" x="384" y="-608" name="NACK" />
+    <pin polarity="Output" x="384" y="-544" name="DS_EN(3:0)" />
+    <pin polarity="Output" x="384" y="-480" name="DS(7:0)" />
+    <pin polarity="Output" x="384" y="-416" name="HSYNC" />
+    <pin polarity="Output" x="384" y="-352" name="VSYNC" />
+    <pin polarity="Output" x="384" y="-288" name="VR(4:0)" />
+    <pin polarity="Output" x="384" y="-224" name="VG(5:0)" />
+    <pin polarity="Output" x="384" y="-160" name="VB(4:0)" />
+    <pin polarity="BiDirectional" x="384" y="-96" name="SCL" />
+    <pin polarity="BiDirectional" x="384" y="-32" name="SDA" />
+    <graph>
+        <rect width="256" x="64" y="-640" height="640" />
+        <attrtext style="alignment:BCENTER;fontsize:56;fontname:Arial" attrname="SymbolName" x="192" y="-648" type="symbol" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-608" type="pin Reset" />
+        <line x2="0" y1="-608" y2="-608" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-320" type="pin CLK" />
+        <line x2="0" y1="-320" y2="-320" x1="64" />
+        <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="-32" type="pin DRDY" />
+        <line x2="0" y1="-32" y2="-32" x1="64" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-608" type="pin NACK" />
+        <line x2="384" y1="-608" y2="-608" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-544" type="pin DS_EN(3:0)" />
+        <rect width="64" x="320" y="-556" height="24" />
+        <line x2="384" y1="-544" y2="-544" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-480" type="pin DS(7:0)" />
+        <rect width="64" x="320" y="-492" height="24" />
+        <line x2="384" y1="-480" y2="-480" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-416" type="pin HSYNC" />
+        <line x2="384" y1="-416" y2="-416" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-352" type="pin VSYNC" />
+        <line x2="384" y1="-352" y2="-352" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-288" type="pin VR(4:0)" />
+        <rect width="64" x="320" y="-300" height="24" />
+        <line x2="384" y1="-288" y2="-288" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-224" type="pin VG(5:0)" />
+        <rect width="64" x="320" y="-236" height="24" />
+        <line x2="384" y1="-224" y2="-224" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-160" type="pin VB(4:0)" />
+        <rect width="64" x="320" y="-172" height="24" />
+        <line x2="384" y1="-160" y2="-160" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-96" type="pin SCL" />
+        <line x2="384" y1="-96" y2="-96" x1="320" />
+        <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="-32" type="pin SDA" />
+        <line x2="384" y1="-32" y2="-32" x1="320" />
+    </graph>
+</symbol>

ucisw2_magnetometr/magneto_i2c.vhf

@@ -0,0 +1,274 @@
+--------------------------------------------------------------------------------
+-- Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
+--------------------------------------------------------------------------------
+--   ____  ____ 
+--  /   /\/   / 
+-- /___/  \  /    Vendor: Xilinx 
+-- \   \   \/     Version : 14.7
+--  \   \         Application : sch2hdl
+--  /   /         Filename : magneto_i2c.vhf
+-- /___/   /\     Timestamp : 05/29/2018 01:34:17
+-- \   \  /  \ 
+--  \___\/\___\ 
+--
+--Command: sch2hdl -intstyle ise -family spartan6 -flat -suppress -vhdl D:/XilinxPrj/ucisw2_magnetometr/magneto_i2c.vhf -w D:/XilinxPrj/ucisw2_magnetometr/magneto_i2c.sch
+--Design Name: magneto_i2c
+--Device: spartan6
+--Purpose:
+--    This vhdl netlist is translated from an ECS schematic. It can be 
+--    synthesized and simulated, but it should not be modified. 
+--
+
+library ieee;
+use ieee.std_logic_1164.ALL;
+use ieee.numeric_std.ALL;
+library UNISIM;
+use UNISIM.Vcomponents.ALL;
+
+entity MagnetoHMC5883LCtrl_MUSER_magneto_i2c is
+   port ( Clk        : in    std_logic; 
+          DRDY       : in    std_logic; 
+          OutputRate : in    std_logic_vector (2 downto 0); 
+          Reset      : in    std_logic; 
+          DRX        : out   std_logic_vector (15 downto 0); 
+          DRY        : out   std_logic_vector (15 downto 0); 
+          DRZ        : out   std_logic_vector (15 downto 0); 
+          DR_New     : out   std_logic; 
+          ID         : out   std_logic_vector (23 downto 0); 
+          NACK       : out   std_logic; 
+          SCL        : inout std_logic; 
+          SDA        : inout std_logic);
+end MagnetoHMC5883LCtrl_MUSER_magneto_i2c;
+
+architecture BEHAVIORAL of MagnetoHMC5883LCtrl_MUSER_magneto_i2c is
+   signal XLXN_4     : std_logic;
+   signal XLXN_5     : std_logic;
+   signal XLXN_6     : std_logic;
+   signal XLXN_27    : std_logic_vector (7 downto 0);
+   signal XLXN_28    : std_logic_vector (7 downto 0);
+   signal XLXN_29    : std_logic_vector (3 downto 0);
+   signal XLXN_52    : std_logic;
+   signal XLXN_54    : std_logic;
+   signal XLXN_55    : std_logic;
+   signal XLXN_57    : std_logic_vector (7 downto 0);
+   component I2C_Master
+      port ( Go         : in    std_logic; 
+             Address    : in    std_logic_vector (7 downto 0); 
+             ReadCnt    : in    std_logic_vector (3 downto 0); 
+             SDA        : inout std_logic; 
+             SCL        : inout std_logic; 
+             FIFO_Pop   : in    std_logic; 
+             FIFO_Push  : in    std_logic; 
+             FIFO_DI    : in    std_logic_vector (7 downto 0); 
+             FIFO_Empty : out   std_logic; 
+             FIFO_Full  : out   std_logic; 
+             FIFO_DO    : out   std_logic_vector (7 downto 0); 
+             Reset      : in    std_logic; 
+             Clk        : in    std_logic; 
+             Busy       : out   std_logic; 
+             NACK       : out   std_logic);
+   end component;
+   
+   component Magneto_Drv
+      port ( I2C_FIFO_Empty : in    std_logic; 
+             I2C_FIFO_Full  : in    std_logic; 
+             I2C_Busy       : in    std_logic; 
+             DRDY           : in    std_logic; 
+             Reset          : in    std_logic; 
+             Clk            : in    std_logic; 
+             I2C_FIFO_DO    : in    std_logic_vector (7 downto 0); 
+             OutputRate     : in    std_logic_vector (2 downto 0); 
+             I2C_Go         : out   std_logic; 
+             I2C_FIFO_Push  : out   std_logic; 
+             I2C_FIFO_Pop   : out   std_logic; 
+             DR_New         : out   std_logic; 
+             I2C_FIFO_DI    : out   std_logic_vector (7 downto 0); 
+             I2C_Addr       : out   std_logic_vector (7 downto 0); 
+             I2C_ReadCnt    : out   std_logic_vector (3 downto 0); 
+             ID             : out   std_logic_vector (23 downto 0); 
+             DRX            : out   std_logic_vector (15 downto 0); 
+             DRY            : out   std_logic_vector (15 downto 0); 
+             DRZ            : out   std_logic_vector (15 downto 0));
+   end component;
+   
+begin
+   I2CCtrl : I2C_Master
+      port map (Address(7 downto 0)=>XLXN_28(7 downto 0),
+                Clk=>Clk,
+                FIFO_DI(7 downto 0)=>XLXN_27(7 downto 0),
+                FIFO_Pop=>XLXN_6,
+                FIFO_Push=>XLXN_5,
+                Go=>XLXN_4,
+                ReadCnt(3 downto 0)=>XLXN_29(3 downto 0),
+                Reset=>Reset,
+                Busy=>XLXN_55,
+                FIFO_DO(7 downto 0)=>XLXN_57(7 downto 0),
+                FIFO_Empty=>XLXN_52,
+                FIFO_Full=>XLXN_54,
+                NACK=>NACK,
+                SCL=>SCL,
+                SDA=>SDA);
+   
+   MagnetoInterface : Magneto_Drv
+      port map (Clk=>Clk,
+                DRDY=>DRDY,
+                I2C_Busy=>XLXN_55,
+                I2C_FIFO_DO(7 downto 0)=>XLXN_57(7 downto 0),
+                I2C_FIFO_Empty=>XLXN_52,
+                I2C_FIFO_Full=>XLXN_54,
+                OutputRate(2 downto 0)=>OutputRate(2 downto 0),
+                Reset=>Reset,
+                DRX(15 downto 0)=>DRX(15 downto 0),
+                DRY(15 downto 0)=>DRY(15 downto 0),
+                DRZ(15 downto 0)=>DRZ(15 downto 0),
+                DR_New=>DR_New,
+                ID(23 downto 0)=>ID(23 downto 0),
+                I2C_Addr(7 downto 0)=>XLXN_28(7 downto 0),
+                I2C_FIFO_DI(7 downto 0)=>XLXN_27(7 downto 0),
+                I2C_FIFO_Pop=>XLXN_6,
+                I2C_FIFO_Push=>XLXN_5,
+                I2C_Go=>XLXN_4,
+                I2C_ReadCnt(3 downto 0)=>XLXN_29(3 downto 0));
+   
+end BEHAVIORAL;
+
+
+
+library ieee;
+use ieee.std_logic_1164.ALL;
+use ieee.numeric_std.ALL;
+library UNISIM;
+use UNISIM.Vcomponents.ALL;
+
+entity magneto_i2c is
+   port ( CLK    : in    std_logic; 
+          DRDY   : in    std_logic; 
+          Rate   : in    std_logic_vector (2 downto 0); 
+          Reset  : in    std_logic; 
+          DRLED  : out   std_logic; 
+          DS     : out   std_logic_vector (7 downto 0); 
+          DS_EN  : out   std_logic_vector (3 downto 0); 
+          H_SYNC : out   std_logic; 
+          NACK   : out   std_logic; 
+          V_B    : out   std_logic_vector (4 downto 0); 
+          V_G    : out   std_logic_vector (5 downto 0); 
+          V_R    : out   std_logic_vector (4 downto 0); 
+          V_SYNC : out   std_logic; 
+          SCL    : inout std_logic; 
+          SDA    : inout std_logic);
+end magneto_i2c;
+
+architecture BEHAVIORAL of magneto_i2c is
+   attribute BOX_TYPE   : string ;
+   signal XLXN_94                    : std_logic_vector (2 downto 0);
+   signal XLXN_110                   : std_logic_vector (15 downto 0);
+   signal XLXN_111                   : std_logic_vector (15 downto 0);
+   signal XLXN_264                   : std_logic;
+   signal XLXN_278                   : std_logic_vector (15 downto 0);
+   signal ZAxisDisp_Blank_openSignal : std_logic_vector (3 downto 0);
+   signal ZAxisDisp_DP_openSignal    : std_logic_vector (3 downto 0);
+   component VGACompass
+      port ( Reset  : in    std_logic; 
+             Clk    : in    std_logic; 
+             DRX    : in    std_logic_vector (15 downto 0); 
+             DRY    : in    std_logic_vector (15 downto 0); 
+             H_SYNC : out   std_logic; 
+             V_SYNC : out   std_logic; 
+             V_R    : out   std_logic_vector (4 downto 0); 
+             V_G    : out   std_logic_vector (5 downto 0); 
+             V_B    : out   std_logic_vector (4 downto 0));
+   end component;
+   
+   component MagnetoHMC5883LCtrl_MUSER_magneto_i2c
+      port ( OutputRate : in    std_logic_vector (2 downto 0); 
+             Clk        : in    std_logic; 
+             Reset      : in    std_logic; 
+             DRDY       : in    std_logic; 
+             DR_New     : out   std_logic; 
+             ID         : out   std_logic_vector (23 downto 0); 
+             DRX        : out   std_logic_vector (15 downto 0); 
+             DRY        : out   std_logic_vector (15 downto 0); 
+             DRZ        : out   std_logic_vector (15 downto 0); 
+             NACK       : out   std_logic; 
+             SDA        : inout std_logic; 
+             SCL        : inout std_logic);
+   end component;
+   
+   component INV
+      port ( I : in    std_logic; 
+             O : out   std_logic);
+   end component;
+   attribute BOX_TYPE of INV : component is "BLACK_BOX";
+   
+   component BUF
+      port ( I : in    std_logic; 
+             O : out   std_logic);
+   end component;
+   attribute BOX_TYPE of BUF : component is "BLACK_BOX";
+   
+   component Display4x7S
+      port ( Clk   : in    std_logic; 
+             DI    : in    std_logic_vector (15 downto 0); 
+             DP    : in    std_logic_vector (3 downto 0); 
+             Blank : in    std_logic_vector (3 downto 0); 
+             DS_EN : out   std_logic_vector (3 downto 0); 
+             DS    : out   std_logic_vector (7 downto 0));
+   end component;
+   
+begin
+   CompassDisp : VGACompass
+      port map (Clk=>CLK,
+                DRX(15 downto 0)=>XLXN_110(15 downto 0),
+                DRY(15 downto 0)=>XLXN_111(15 downto 0),
+                Reset=>XLXN_264,
+                H_SYNC=>H_SYNC,
+                V_B(4 downto 0)=>V_B(4 downto 0),
+                V_G(5 downto 0)=>V_G(5 downto 0),
+                V_R(4 downto 0)=>V_R(4 downto 0),
+                V_SYNC=>V_SYNC);
+   
+   MagnetoCtrl : MagnetoHMC5883LCtrl_MUSER_magneto_i2c
+      port map (Clk=>CLK,
+                DRDY=>DRDY,
+                OutputRate(2 downto 0)=>XLXN_94(2 downto 0),
+                Reset=>XLXN_264,
+                DRX(15 downto 0)=>XLXN_110(15 downto 0),
+                DRY(15 downto 0)=>XLXN_111(15 downto 0),
+                DRZ(15 downto 0)=>XLXN_278(15 downto 0),
+                DR_New=>open,
+                ID=>open,
+                NACK=>NACK,
+                SCL=>SCL,
+                SDA=>SDA);
+   
+   XLXI_5 : INV
+      port map (I=>Reset,
+                O=>XLXN_264);
+   
+   XLXI_19 : BUF
+      port map (I=>DRDY,
+                O=>DRLED);
+   
+   XLXI_20_0 : INV
+      port map (I=>Rate(0),
+                O=>XLXN_94(0));
+   
+   XLXI_20_1 : INV
+      port map (I=>Rate(1),
+                O=>XLXN_94(1));
+   
+   XLXI_20_2 : INV
+      port map (I=>Rate(2),
+                O=>XLXN_94(2));
+   
+   ZAxisDisp : Display4x7S
+      port map (Blank(3 downto 0)=>ZAxisDisp_Blank_openSignal(3 downto 0),
+                Clk=>CLK,
+                DI(15 downto 0)=>XLXN_278(15 downto 0),
+                DP(3 downto 0)=>ZAxisDisp_DP_openSignal(3 downto 0),
+                DS(7 downto 0)=>DS(7 downto 0),
+                DS_EN(3 downto 0)=>DS_EN(3 downto 0));
+   
+end BEHAVIORAL;
+
+

ucisw2_magnetometr/sch2HdlBatchFile

@@ -0,0 +1 @@
+sch2hdl,-intstyle,ise,-family,spartan6,-flat,-suppress,-vhdl,D:/XilinxPrj/ucisw2_magnetometr/magneto_i2c.vhf,-w,D:/XilinxPrj/ucisw2_magnetometr/magneto_i2c.sch

ucisw2_magnetometr/ucisw2_magnetometr.xise

@@ -0,0 +1,389 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
+
+  <header>
+    <!-- ISE source project file created by Project Navigator.             -->
+    <!--                                                                   -->
+    <!-- This file contains project source information including a list of -->
+    <!-- project source files, project and process properties.  This file, -->
+    <!-- along with the project source files, is sufficient to open and    -->
+    <!-- implement in ISE Project Navigator.                               -->
+    <!--                                                                   -->
+    <!-- Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved. -->
+  </header>
+
+  <version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/>
+
+  <files>
+    <file xil_pn:name="magneto_i2c.sch" xil_pn:type="FILE_SCHEMATIC">
+      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/>
+      <association xil_pn:name="Implementation" xil_pn:seqID="6"/>
+    </file>
+    <file xil_pn:name="ESPIER_III.ucf" xil_pn:type="FILE_UCF">
+      <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
+    </file>
+    <file xil_pn:name="I2C_Master.vhd" xil_pn:type="FILE_VHDL">
+      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="4"/>
+      <association xil_pn:name="Implementation" xil_pn:seqID="2"/>
+    </file>
+    <file xil_pn:name="Magneto_Drv.vhd" xil_pn:type="FILE_VHDL">
+      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="5"/>
+      <association xil_pn:name="Implementation" xil_pn:seqID="1"/>
+    </file>
+    <file xil_pn:name="MagnetoHMC5883LCtrl.sch" xil_pn:type="FILE_SCHEMATIC">
+      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="65"/>
+      <association xil_pn:name="Implementation" xil_pn:seqID="4"/>
+    </file>
+    <file xil_pn:name="Display4x7S.vhd" xil_pn:type="FILE_VHDL">
+      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="67"/>
+      <association xil_pn:name="Implementation" xil_pn:seqID="5"/>
+    </file>
+    <file xil_pn:name="VGACompass.vhd" xil_pn:type="FILE_VHDL">
+      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="78"/>
+      <association xil_pn:name="Implementation" xil_pn:seqID="3"/>
+    </file>
+    <file xil_pn:name="Magneto_J3.ucf" xil_pn:type="FILE_UCF">
+      <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
+    </file>
+  </files>
+
+  <properties>
+    <property xil_pn:name="AES Initial Vector spartan6" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="AES Key (Hex String) spartan6" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Add I/O Buffers" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Allow Logic Optimization Across Hierarchy" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Allow SelectMAP Pins to Persist" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Allow Unexpanded Blocks" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Allow Unmatched LOC Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Allow Unmatched Timing Group Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Analysis Effort Level" xil_pn:value="Standard" xil_pn:valueState="default"/>
+    <property xil_pn:name="Asynchronous To Synchronous" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Auto Implementation Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Auto Implementation Top" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Automatic BRAM Packing" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Automatically Insert glbl Module in the Netlist" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Automatically Run Generate Target PROM/ACE File" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="BRAM Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
+    <property xil_pn:name="Bring Out Global Set/Reset Net as a Port" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Bring Out Global Tristate Net as a Port" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Bus Delimiter" xil_pn:value="&lt;>" xil_pn:valueState="default"/>
+    <property xil_pn:name="Case" xil_pn:value="Maintain" xil_pn:valueState="default"/>
+    <property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
+    <property xil_pn:name="Change Device Speed To" xil_pn:value="-3" xil_pn:valueState="default"/>
+    <property xil_pn:name="Change Device Speed To Post Trace" xil_pn:value="-3" xil_pn:valueState="default"/>
+    <property xil_pn:name="Combinatorial Logic Optimization" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Compile EDK Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Compile XilinxCoreLib (CORE Generator) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Compile for HDL Debugging" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Configuration Clk (Configuration Pins)" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="Configuration Pin Done" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="Configuration Pin M0" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="Configuration Pin M1" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="Configuration Pin M2" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="Configuration Pin Program" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="Configuration Rate spartan6" xil_pn:value="2" xil_pn:valueState="default"/>
+    <property xil_pn:name="Correlate Output to Input Design" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Create ASCII Configuration File" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Create Binary Configuration File" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Create Bit File" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Create I/O Pads from Ports" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Create IEEE 1532 Configuration File spartan6" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Create Logic Allocation File" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Create Mask File" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Create ReadBack Data Files" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Cross Clock Analysis" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="DSP Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
+    <property xil_pn:name="Delay Values To Be Read from SDF" xil_pn:value="Setup Time" xil_pn:valueState="default"/>
+    <property xil_pn:name="Device" xil_pn:value="xc6slx9" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Device Family" xil_pn:value="Spartan6" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Device Speed Grade/Select ABS Minimum" xil_pn:value="-3" xil_pn:valueState="default"/>
+    <property xil_pn:name="Disable Detailed Package Model Insertion" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Do Not Escape Signal and Instance Names in Netlist" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Done (Output Events)" xil_pn:value="Default (4)" xil_pn:valueState="default"/>
+    <property xil_pn:name="Drive Awake Pin During Suspend/Wake Sequence spartan6" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Drive Done Pin High" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable BitStream Compression" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable Cyclic Redundancy Checking (CRC) spartan6" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable Debugging of Serial Mode BitStream" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable External Master Clock spartan6" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable Hardware Co-Simulation" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable Internal Done Pipe" xil_pn:value="true" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Enable Message Filtering" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable Multi-Pin Wake-Up Suspend Mode spartan6" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable Multi-Threading" xil_pn:value="Off" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable Multi-Threading par spartan6" xil_pn:value="Off" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable Outputs (Output Events)" xil_pn:value="Default (5)" xil_pn:valueState="default"/>
+    <property xil_pn:name="Enable Suspend/Wake Global Set/Reset spartan6" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Encrypt Bitstream spartan6" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Encrypt Key Select spartan6" xil_pn:value="BBRAM" xil_pn:valueState="default"/>
+    <property xil_pn:name="Equivalent Register Removal Map" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Essential Bits" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Evaluation Development Board" xil_pn:value="None Specified" xil_pn:valueState="default"/>
+    <property xil_pn:name="Exclude Compilation of Deprecated EDK Cores" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Exclude Compilation of EDK Sub-Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Extra Cost Tables Map" xil_pn:value="0" xil_pn:valueState="default"/>
+    <property xil_pn:name="Extra Effort (Highest PAR level only)" xil_pn:value="None" xil_pn:valueState="default"/>
+    <property xil_pn:name="FPGA Start-Up Clock" xil_pn:value="CCLK" xil_pn:valueState="default"/>
+    <property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="FSM Style" xil_pn:value="LUT" xil_pn:valueState="default"/>
+    <property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Flatten Output Netlist" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="VHDL" xil_pn:valueState="default"/>
+    <property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="VHDL" xil_pn:valueState="default"/>
+    <property xil_pn:name="Functional Model Target Language Schematic" xil_pn:value="VHDL" xil_pn:valueState="default"/>
+    <property xil_pn:name="GTS Cycle During Suspend/Wakeup Sequence spartan6" xil_pn:value="4" xil_pn:valueState="default"/>
+    <property xil_pn:name="GWE Cycle During Suspend/Wakeup Sequence spartan6" xil_pn:value="5" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Architecture Only (No Entity Declaration)" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Asynchronous Delay Report" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Clock Region Report" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Constraints Interaction Report" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Constraints Interaction Report Post Trace" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Datasheet Section" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Datasheet Section Post Trace" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Detailed MAP Report" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Multiple Hierarchical Netlist Files" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Post-Place &amp; Route Power Report" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Post-Place &amp; Route Simulation Model" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate RTL Schematic" xil_pn:value="Yes" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate SAIF File for Power Optimization/Estimation Par" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Testbench File" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Timegroups Section" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generate Timegroups Section Post Trace" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Generics, Parameters" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Global Optimization Goal" xil_pn:value="AllClockNets" xil_pn:valueState="default"/>
+    <property xil_pn:name="Global Optimization map spartan6" xil_pn:value="Off" xil_pn:valueState="default"/>
+    <property xil_pn:name="Global Set/Reset Port Name" xil_pn:value="GSR_PORT" xil_pn:valueState="default"/>
+    <property xil_pn:name="Global Tristate Port Name" xil_pn:value="GTS_PORT" xil_pn:valueState="default"/>
+    <property xil_pn:name="Hierarchy Separator" xil_pn:value="/" xil_pn:valueState="default"/>
+    <property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
+    <property xil_pn:name="Ignore User Timing Constraints Map" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Ignore User Timing Constraints Par" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Implementation Top" xil_pn:value="Module|magneto_i2c" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Implementation Top File" xil_pn:value="magneto_i2c.sch" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/magneto_i2c" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Include 'uselib Directive in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Include SIMPRIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Include UNISIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Include sdf_annotate task in Verilog File" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Incremental Compilation" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Insert Buffers to Prevent Pulse Swallowing" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Instantiation Template Target Language Xps" xil_pn:value="VHDL" xil_pn:valueState="default"/>
+    <property xil_pn:name="JTAG Pin TCK" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="JTAG Pin TDI" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="JTAG Pin TDO" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="JTAG Pin TMS" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
+    <property xil_pn:name="Keep Hierarchy" xil_pn:value="No" xil_pn:valueState="default"/>
+    <property xil_pn:name="LUT Combining Map" xil_pn:value="Off" xil_pn:valueState="default"/>
+    <property xil_pn:name="LUT Combining Xst" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
+    <property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
+    <property xil_pn:name="Last Applied Strategy" xil_pn:value="Xilinx Default (unlocked)" xil_pn:valueState="default"/>
+    <property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Map Slice Logic into Unused Block RAMs" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Mask Pins for Multi-Pin Wake-Up Suspend Mode spartan6" xil_pn:value="0x00" xil_pn:valueState="default"/>
+    <property xil_pn:name="Max Fanout" xil_pn:value="100000" xil_pn:valueState="default"/>
+    <property xil_pn:name="Maximum Compression" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Maximum Number of Lines in Report" xil_pn:value="1000" xil_pn:valueState="default"/>
+    <property xil_pn:name="Maximum Signal Name Length" xil_pn:value="20" xil_pn:valueState="default"/>
+    <property xil_pn:name="Move First Flip-Flop Stage" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Move Last Flip-Flop Stage" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="MultiBoot: Insert IPROG CMD in the Bitfile spartan6" xil_pn:value="Enable" xil_pn:valueState="default"/>
+    <property xil_pn:name="MultiBoot: Next Configuration Mode spartan6" xil_pn:value="001" xil_pn:valueState="default"/>
+    <property xil_pn:name="MultiBoot: Starting Address for Golden Configuration spartan6" xil_pn:value="0x00000000" xil_pn:valueState="default"/>
+    <property xil_pn:name="MultiBoot: Starting Address for Next Configuration spartan6" xil_pn:value="0x00000000" xil_pn:valueState="default"/>
+    <property xil_pn:name="MultiBoot: Use New Mode for Next Configuration spartan6" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="MultiBoot: User-Defined Register for Failsafe Scheme spartan6" xil_pn:value="0x0000" xil_pn:valueState="default"/>
+    <property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
+    <property xil_pn:name="Netlist Translation Type" xil_pn:value="Timestamp" xil_pn:valueState="default"/>
+    <property xil_pn:name="Number of Clock Buffers" xil_pn:value="16" xil_pn:valueState="default"/>
+    <property xil_pn:name="Number of Paths in Error/Verbose Report" xil_pn:value="3" xil_pn:valueState="default"/>
+    <property xil_pn:name="Number of Paths in Error/Verbose Report Post Trace" xil_pn:value="3" xil_pn:valueState="default"/>
+    <property xil_pn:name="Optimization Effort spartan6" xil_pn:value="Normal" xil_pn:valueState="default"/>
+    <property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/>
+    <property xil_pn:name="Optimize Instantiated Primitives" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Bitgen Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Bitgen Command Line Options spartan6" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Compiler Options Map" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Compiler Options Par" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Compiler Options Translate" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Compxlib Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Map Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other NETGEN Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Ngdbuild Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Place &amp; Route Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Simulator Commands Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Simulator Commands Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Simulator Commands Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other Simulator Commands Post-Translate" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other XPWR Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Other XST Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Output Extended Identifiers" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Output File Name" xil_pn:value="magneto_i2c" xil_pn:valueState="default"/>
+    <property xil_pn:name="Overwrite Compiled Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Overwrite Existing Symbol" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Pack I/O Registers into IOBs" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="Pack I/O Registers/Latches into IOBs" xil_pn:value="Off" xil_pn:valueState="default"/>
+    <property xil_pn:name="Package" xil_pn:value="tqg144" xil_pn:valueState="default"/>
+    <property xil_pn:name="Perform Advanced Analysis" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Perform Advanced Analysis Post Trace" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Perform Timing-Driven Packing and Placement" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Place &amp; Route Effort Level (Overall)" xil_pn:value="High" xil_pn:valueState="default"/>
+    <property xil_pn:name="Place And Route Mode" xil_pn:value="Normal Place and Route" xil_pn:valueState="default"/>
+    <property xil_pn:name="Place MultiBoot Settings into Bitstream spartan6" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Placer Effort Level Map" xil_pn:value="High" xil_pn:valueState="default"/>
+    <property xil_pn:name="Placer Extra Effort Map" xil_pn:value="None" xil_pn:valueState="default"/>
+    <property xil_pn:name="Port to be used" xil_pn:value="Auto - default" xil_pn:valueState="default"/>
+    <property xil_pn:name="Post Map Simulation Model Name" xil_pn:value="magneto_i2c_map.vhd" xil_pn:valueState="default"/>
+    <property xil_pn:name="Post Place &amp; Route Simulation Model Name" xil_pn:value="magneto_i2c_timesim.vhd" xil_pn:valueState="default"/>
+    <property xil_pn:name="Post Synthesis Simulation Model Name" xil_pn:value="magneto_i2c_synthesis.vhd" xil_pn:valueState="default"/>
+    <property xil_pn:name="Post Translate Simulation Model Name" xil_pn:value="magneto_i2c_translate.vhd" xil_pn:valueState="default"/>
+    <property xil_pn:name="Power Reduction Map spartan6" xil_pn:value="Off" xil_pn:valueState="default"/>
+    <property xil_pn:name="Power Reduction Par" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Power Reduction Xst" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Preferred Language" xil_pn:value="VHDL" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Produce Verbose Report" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Project Description" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Property Specification in Project File" xil_pn:value="Store all values" xil_pn:valueState="default"/>
+    <property xil_pn:name="RAM Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="RAM Style" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="ROM Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="ROM Style" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="Read Cores" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Reduce Control Sets" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="Regenerate Core" xil_pn:value="Under Current Project Setting" xil_pn:valueState="default"/>
+    <property xil_pn:name="Register Balancing" xil_pn:value="No" xil_pn:valueState="default"/>
+    <property xil_pn:name="Register Duplication Map" xil_pn:value="Off" xil_pn:valueState="default"/>
+    <property xil_pn:name="Register Duplication Xst" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Register Ordering spartan6" xil_pn:value="4" xil_pn:valueState="default"/>
+    <property xil_pn:name="Release Write Enable (Output Events)" xil_pn:value="Default (6)" xil_pn:valueState="default"/>
+    <property xil_pn:name="Rename Design Instance in Testbench File to" xil_pn:value="UUT" xil_pn:valueState="default"/>
+    <property xil_pn:name="Rename Top Level Architecture To" xil_pn:value="Structure" xil_pn:valueState="default"/>
+    <property xil_pn:name="Rename Top Level Entity to" xil_pn:value="magneto_i2c" xil_pn:valueState="default"/>
+    <property xil_pn:name="Rename Top Level Module To" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Report Fastest Path(s) in Each Constraint" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Report Fastest Path(s) in Each Constraint Post Trace" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Report Paths by Endpoint" xil_pn:value="3" xil_pn:valueState="default"/>
+    <property xil_pn:name="Report Paths by Endpoint Post Trace" xil_pn:value="3" xil_pn:valueState="default"/>
+    <property xil_pn:name="Report Type" xil_pn:value="Verbose Report" xil_pn:valueState="default"/>
+    <property xil_pn:name="Report Type Post Trace" xil_pn:value="Verbose Report" xil_pn:valueState="default"/>
+    <property xil_pn:name="Report Unconstrained Paths" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Report Unconstrained Paths Post Trace" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Reset On Configuration Pulse Width" xil_pn:value="100" xil_pn:valueState="default"/>
+    <property xil_pn:name="Resource Sharing" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Retain Hierarchy" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Retry Configuration if CRC Error Occurs spartan6" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Revision Select" xil_pn:value="00" xil_pn:valueState="default"/>
+    <property xil_pn:name="Revision Select Tristate" xil_pn:value="Disable" xil_pn:valueState="default"/>
+    <property xil_pn:name="Run Design Rules Checker (DRC)" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Run for Specified Time" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Run for Specified Time Map" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Run for Specified Time Par" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
+    <property xil_pn:name="Security" xil_pn:value="Enable Readback and Reconfiguration" xil_pn:valueState="default"/>
+    <property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Selected Simulation Root Source Node Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Selected Simulation Root Source Node Post-Translate" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Selected Simulation Source Node" xil_pn:value="UUT" xil_pn:valueState="default"/>
+    <property xil_pn:name="Set SPI Configuration Bus Width spartan6" xil_pn:value="1" xil_pn:valueState="default"/>
+    <property xil_pn:name="Setup External Master Clock Division spartan6" xil_pn:value="1" xil_pn:valueState="default"/>
+    <property xil_pn:name="Shift Register Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Shift Register Minimum Size spartan6" xil_pn:value="2" xil_pn:valueState="default"/>
+    <property xil_pn:name="Show All Models" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Simulation Model Target" xil_pn:value="VHDL" xil_pn:valueState="default"/>
+    <property xil_pn:name="Simulation Run Time ISim" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
+    <property xil_pn:name="Simulation Run Time Map" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
+    <property xil_pn:name="Simulation Run Time Par" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
+    <property xil_pn:name="Simulation Run Time Translate" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
+    <property xil_pn:name="Simulator" xil_pn:value="ISim (VHDL/Verilog)" xil_pn:valueState="default"/>
+    <property xil_pn:name="Slice Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
+    <property xil_pn:name="Specify 'define Macro Name and Value" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Specify Top Level Instance Names Behavioral" xil_pn:value="Default" xil_pn:valueState="default"/>
+    <property xil_pn:name="Specify Top Level Instance Names Post-Map" xil_pn:value="Default" xil_pn:valueState="default"/>
+    <property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="Default" xil_pn:valueState="default"/>
+    <property xil_pn:name="Specify Top Level Instance Names Post-Translate" xil_pn:value="Default" xil_pn:valueState="default"/>
+    <property xil_pn:name="Speed Grade" xil_pn:value="-3" xil_pn:valueState="default"/>
+    <property xil_pn:name="Starting Placer Cost Table (1-100) Map spartan6" xil_pn:value="1" xil_pn:valueState="default"/>
+    <property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
+    <property xil_pn:name="Target Simulator" xil_pn:value="Please Specify" xil_pn:valueState="default"/>
+    <property xil_pn:name="Timing Mode Map" xil_pn:value="Performance Evaluation" xil_pn:valueState="default"/>
+    <property xil_pn:name="Timing Mode Par" xil_pn:value="Performance Evaluation" xil_pn:valueState="default"/>
+    <property xil_pn:name="Top-Level Module Name in Output Netlist" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL" xil_pn:valueState="default"/>
+    <property xil_pn:name="Trim Unconnected Signals" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Tristate On Configuration Pulse Width" xil_pn:value="0" xil_pn:valueState="default"/>
+    <property xil_pn:name="Unused IOB Pins" xil_pn:value="Pull Down" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use 64-bit PlanAhead on 64-bit Systems" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Clock Enable" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Project File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Project File Post-Map" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Project File Post-Route" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Project File Post-Translate" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Simulation Command File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Simulation Command File Map" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Simulation Command File Par" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Simulation Command File Translate" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Waveform Configuration File Behav" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Waveform Configuration File Map" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Waveform Configuration File Par" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Custom Waveform Configuration File Translate" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use DSP Block spartan6" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use LOC Constraints" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use RLOC Constraints" xil_pn:value="Yes" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Synchronous Reset" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Synchronous Set" xil_pn:value="Auto" xil_pn:valueState="default"/>
+    <property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="User Browsed Strategy Files" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="UserID Code (8 Digit Hexadecimal)" xil_pn:value="0xFFFFFFFF" xil_pn:valueState="default"/>
+    <property xil_pn:name="VCCAUX Voltage Level spartan6" xil_pn:value="2.5V" xil_pn:valueState="default"/>
+    <property xil_pn:name="VHDL Source Analysis Standard" xil_pn:value="VHDL-93" xil_pn:valueState="default"/>
+    <property xil_pn:name="Value Range Check" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Verilog Macros" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="Wait for DCM and PLL Lock (Output Events) spartan6" xil_pn:value="Default (NoWait)" xil_pn:valueState="default"/>
+    <property xil_pn:name="Wakeup Clock spartan6" xil_pn:value="Startup Clock" xil_pn:valueState="default"/>
+    <property xil_pn:name="Watchdog Timer Value spartan6" xil_pn:value="0xFFFF" xil_pn:valueState="default"/>
+    <property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Write Timing Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="iMPACT Project File" xil_pn:value="magneto_impact.ipf" xil_pn:valueState="non-default"/>
+    <!--                                                                                  -->
+    <!-- The following properties are for internal use only. These should not be modified.-->
+    <!--                                                                                  -->
+    <property xil_pn:name="PROP_BehavioralSimTop" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="PROP_DesignName" xil_pn:value="ucisw2_magnetometr" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="spartan6" xil_pn:valueState="default"/>
+    <property xil_pn:name="PROP_FPGAConfiguration" xil_pn:value="FPGAConfiguration" xil_pn:valueState="default"/>
+    <property xil_pn:name="PROP_PostMapSimTop" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="PROP_PostParSimTop" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="PROP_PostSynthSimTop" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="PROP_PostXlateSimTop" xil_pn:value="" xil_pn:valueState="default"/>
+    <property xil_pn:name="PROP_PreSynthesis" xil_pn:value="PreSynthesis" xil_pn:valueState="default"/>
+    <property xil_pn:name="PROP_intProjectCreationTimestamp" xil_pn:value="2018-02-27T19:49:27" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="PROP_intWbtProjectID" xil_pn:value="314A4698C6E04344934998418F4F4609" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="Same" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="No" xil_pn:valueState="non-default"/>
+  </properties>
+
+  <bindings/>
+
+  <libraries/>
+
+  <autoManagedFiles>
+    <!-- The following files are identified by `include statements in verilog -->
+    <!-- source files and are automatically managed by Project Navigator.     -->
+    <!--                                                                      -->
+    <!-- Do not hand-edit this section, as it will be overwritten when the    -->
+    <!-- project is analyzed based on files automatically identified as       -->
+    <!-- include files.                                                       -->
+  </autoManagedFiles>
+
+</project>